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| author | Clifford Wolf <clifford@clifford.at> | 2019-05-02 09:11:07 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-05-02 09:11:07 +0200 |
| commit | 98925f6c4be611434e75f0ccf645a7ef8adcfc63 (patch) | |
| tree | d936c93a1bb9c52de452b03690c56d44952be49b /kernel/log.cc | |
| parent | 485bf372e7388f3f8609db2725cecd3fcebc5b06 (diff) | |
| parent | d394b9301b2619b8cb64f9faea4c112bf2a07925 (diff) | |
| download | yosys-98925f6c4be611434e75f0ccf645a7ef8adcfc63.tar.gz yosys-98925f6c4be611434e75f0ccf645a7ef8adcfc63.tar.bz2 yosys-98925f6c4be611434e75f0ccf645a7ef8adcfc63.zip | |
Merge pull request #963 from YosysHQ/eddie/synth_xilinx_fine
Revert synth_xilinx 'fine' label more to how it used to be...
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