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| author | Clifford Wolf <clifford@clifford.at> | 2018-05-24 18:13:38 +0200 |
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| committer | Clifford Wolf <clifford@clifford.at> | 2018-05-24 18:13:38 +0200 |
| commit | 251562a4918576bd485bcdcc908c0ac780689a77 (patch) | |
| tree | b7370ee9bc9428d52664aba93acafd973e9dc010 /kernel/bitpattern.h | |
| parent | 4d645f0fce9e3af857cb292eca719c22141d379b (diff) | |
| download | yosys-251562a4918576bd485bcdcc908c0ac780689a77.tar.gz yosys-251562a4918576bd485bcdcc908c0ac780689a77.tar.bz2 yosys-251562a4918576bd485bcdcc908c0ac780689a77.zip | |
Fix VerificClocking for cases where Verific generates chains of PRIM_SVA_POSEDGE
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'kernel/bitpattern.h')
0 files changed, 0 insertions, 0 deletions