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| author | Clifford Wolf <clifford@clifford.at> | 2015-04-04 19:00:15 +0200 |
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| committer | Clifford Wolf <clifford@clifford.at> | 2015-04-04 19:00:15 +0200 |
| commit | c52a4cdeede6904f9b0d91a61a3fbeaade71a46a (patch) | |
| tree | 4f99ae1b20ea35994ce7d092dbdbd4b8aab4c409 /frontends/verilog | |
| parent | b0c0ede879341c0beeae4a9a5e8578da12f3b3f1 (diff) | |
| download | yosys-c52a4cdeede6904f9b0d91a61a3fbeaade71a46a.tar.gz yosys-c52a4cdeede6904f9b0d91a61a3fbeaade71a46a.tar.bz2 yosys-c52a4cdeede6904f9b0d91a61a3fbeaade71a46a.zip | |
Added "dffinit", Support for initialized Xilinx DFF
Diffstat (limited to 'frontends/verilog')
0 files changed, 0 insertions, 0 deletions