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| author | Clifford Wolf <clifford@clifford.at> | 2018-01-07 16:36:13 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2018-01-07 16:36:13 +0100 |
| commit | a96c775a7301645b27486a5e663c75fca460f577 (patch) | |
| tree | 18ab72d9bcf1fe0da59e993f71dc2ccf09f21066 /frontends/verilog | |
| parent | 446ccf1f05b2b36db9161bf4ab050778a1cbaee6 (diff) | |
| download | yosys-a96c775a7301645b27486a5e663c75fca460f577.tar.gz yosys-a96c775a7301645b27486a5e663c75fca460f577.tar.bz2 yosys-a96c775a7301645b27486a5e663c75fca460f577.zip | |
Add support for "yosys -E"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'frontends/verilog')
| -rw-r--r-- | frontends/verilog/preproc.cc | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/frontends/verilog/preproc.cc b/frontends/verilog/preproc.cc index 00bdcee43..c43ff4e3a 100644 --- a/frontends/verilog/preproc.cc +++ b/frontends/verilog/preproc.cc @@ -400,10 +400,12 @@ std::string frontend_verilog_preproc(std::istream &f, std::string filename, cons if (!ff.fail()) break; } } - if (ff.fail()) + if (ff.fail()) { output_code.push_back("`file_notfound " + fn); - else + } else { input_file(ff, fixed_fn); + yosys_input_files.insert(fixed_fn); + } continue; } |