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| author | Clifford Wolf <clifford@clifford.at> | 2016-04-21 23:28:37 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-04-21 23:28:37 +0200 |
| commit | 0bc95f1e049afc35bb5ea30663b0a5725dfbf584 (patch) | |
| tree | 3a8641d3a9bb5794a24145ce368f3db7a3963709 /frontends/verilog | |
| parent | 1565d1af69f552b790aa43fd6be194ee59ab76f3 (diff) | |
| download | yosys-0bc95f1e049afc35bb5ea30663b0a5725dfbf584.tar.gz yosys-0bc95f1e049afc35bb5ea30663b0a5725dfbf584.tar.bz2 yosys-0bc95f1e049afc35bb5ea30663b0a5725dfbf584.zip | |
Added "yosys -D" feature
Diffstat (limited to 'frontends/verilog')
| -rw-r--r-- | frontends/verilog/verilog_frontend.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/frontends/verilog/verilog_frontend.cc b/frontends/verilog/verilog_frontend.cc index 11c2824c3..f8ccda181 100644 --- a/frontends/verilog/verilog_frontend.cc +++ b/frontends/verilog/verilog_frontend.cc @@ -186,7 +186,7 @@ struct VerilogFrontend : public Frontend { formal_mode = false; default_nettype_wire = true; - log_header("Executing Verilog-2005 frontend.\n"); + log_header(design, "Executing Verilog-2005 frontend.\n"); args.insert(args.begin()+1, verilog_defaults.begin(), verilog_defaults.end()); |