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author | Clifford Wolf <clifford@clifford.at> | 2014-02-17 14:28:52 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2014-02-17 14:28:52 +0100 |
commit | 02e6f2c5be8c5514cc8cdb7b3344f6170fb87af9 (patch) | |
tree | e5adb1a2baa9eba28f7c28bf755d00da266bfe52 /frontends/verilog/preproc.cc | |
parent | 0851c2b6ea7044d9bce2014a2be2365a2bf7e1b0 (diff) | |
download | yosys-02e6f2c5be8c5514cc8cdb7b3344f6170fb87af9.tar.gz yosys-02e6f2c5be8c5514cc8cdb7b3344f6170fb87af9.tar.bz2 yosys-02e6f2c5be8c5514cc8cdb7b3344f6170fb87af9.zip |
Added Verilog support for "`default_nettype none"
Diffstat (limited to 'frontends/verilog/preproc.cc')
-rw-r--r-- | frontends/verilog/preproc.cc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/frontends/verilog/preproc.cc b/frontends/verilog/preproc.cc index db53e8c68..873ae3d51 100644 --- a/frontends/verilog/preproc.cc +++ b/frontends/verilog/preproc.cc @@ -373,7 +373,6 @@ std::string frontend_verilog_preproc(FILE *f, std::string filename, const std::m } if (tok == "`timescale") { - std::string name; skip_spaces(); while (!tok.empty() && tok != "\n") tok = next_token(true); |