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| author | Eddie Hung <eddieh@ece.ubc.ca> | 2019-02-08 08:09:30 -0800 |
|---|---|---|
| committer | Eddie Hung <eddieh@ece.ubc.ca> | 2019-02-08 08:09:30 -0800 |
| commit | 652e414392b8e9e8c7dde74e6f2c2369d8d65a20 (patch) | |
| tree | 5eae94c7a8eed6a4ccdbee80db202174ce82ecee /frontends/aiger | |
| parent | fafa972238e91f6d25bfa307a4ead4035477df18 (diff) | |
| download | yosys-652e414392b8e9e8c7dde74e6f2c2369d8d65a20.tar.gz yosys-652e414392b8e9e8c7dde74e6f2c2369d8d65a20.tar.bz2 yosys-652e414392b8e9e8c7dde74e6f2c2369d8d65a20.zip | |
Change literal vars from int to unsigned
Diffstat (limited to 'frontends/aiger')
| -rw-r--r-- | frontends/aiger/aigerparse.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc index abff6d8d9..0414d3db3 100644 --- a/frontends/aiger/aigerparse.cc +++ b/frontends/aiger/aigerparse.cc @@ -100,7 +100,7 @@ static void parse_aiger_ascii(RTLIL::Design *design, std::istream &f, std::strin return wire; }; - int l1, l2, l3; + unsigned l1, l2, l3; // Parse inputs std::vector<RTLIL::Wire*> inputs; |