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| author | Eddie Hung <eddie@fpgeh.com> | 2020-01-13 21:28:27 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-01-13 21:28:27 -0800 |
| commit | ee95fa959acc3a796836c9df970d6739d6cf0ade (patch) | |
| tree | dbc2a351308419cda045be718acb37e626a7a5a0 /frontends/aiger/aigerparse.h | |
| parent | 565d349dc9963c9cde887c0632e8451f01997b1c (diff) | |
| download | yosys-ee95fa959acc3a796836c9df970d6739d6cf0ade.tar.gz yosys-ee95fa959acc3a796836c9df970d6739d6cf0ade.tar.bz2 yosys-ee95fa959acc3a796836c9df970d6739d6cf0ade.zip | |
read_aiger: uniquify wires with $aiger<autoidx> prefix
Diffstat (limited to 'frontends/aiger/aigerparse.h')
| -rw-r--r-- | frontends/aiger/aigerparse.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/frontends/aiger/aigerparse.h b/frontends/aiger/aigerparse.h index de3c3efbc..722f1e472 100644 --- a/frontends/aiger/aigerparse.h +++ b/frontends/aiger/aigerparse.h @@ -33,6 +33,7 @@ struct AigerReader RTLIL::Module *module; std::string map_filename; bool wideports; + const int aiger_autoidx; unsigned M, I, L, O, A; unsigned B, C, J, F; // Optional in AIGER 1.9 @@ -51,6 +52,8 @@ struct AigerReader void parse_aiger_ascii(); void parse_aiger_binary(); void post_process(); + + RTLIL::Wire* createWireIfNotExists(RTLIL::Module *module, unsigned literal); }; YOSYS_NAMESPACE_END |