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| author | Aman Goel <amangoel@umich.edu> | 2018-07-04 15:14:58 -0400 |
|---|---|---|
| committer | Aman Goel <amangoel@umich.edu> | 2018-07-04 15:14:58 -0400 |
| commit | f0b1ec3e9758582bc0215e646c331e45a4e2a824 (patch) | |
| tree | 2847b1045fbf06420cfdce3ccf8bae1346d8c5b3 /examples | |
| parent | 6e63df6dd08fe424f46039d26f9f238ac1cb4494 (diff) | |
| parent | 4d343fc1cdafe469484846051680ca0b1f948549 (diff) | |
| download | yosys-f0b1ec3e9758582bc0215e646c331e45a4e2a824.tar.gz yosys-f0b1ec3e9758582bc0215e646c331e45a4e2a824.tar.bz2 yosys-f0b1ec3e9758582bc0215e646c331e45a4e2a824.zip | |
Merge branch 'YosysHQ-master'
Diffstat (limited to 'examples')
| -rw-r--r-- | examples/cmos/counter.ys | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/examples/cmos/counter.ys b/examples/cmos/counter.ys index a784f3465..d0b093667 100644 --- a/examples/cmos/counter.ys +++ b/examples/cmos/counter.ys @@ -1,11 +1,12 @@ - read_verilog counter.v read_verilog -lib cmos_cells.v -proc;; memory;; techmap;; - +synth dfflibmap -liberty cmos_cells.lib -abc -liberty cmos_cells.lib;; +abc -liberty cmos_cells.lib +opt_clean + +stat -liberty cmos_cells.lib # http://vlsiarch.ecen.okstate.edu/flows/MOSIS_SCMOS/latest/cadence/lib/tsmc025/signalstorm/osu025_stdcells.lib # dfflibmap -liberty osu025_stdcells.lib @@ -13,4 +14,3 @@ abc -liberty cmos_cells.lib;; write_verilog synth.v write_spice synth.sp - |