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author | Clifford Wolf <clifford@clifford.at> | 2019-01-05 17:02:01 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2019-01-05 17:02:01 +0100 |
commit | f589ce86bac3169281a077248af328f6758ff0eb (patch) | |
tree | 838e2616a8fe72f17df3e328e13eab51064539bf /examples/igloo2/example.v | |
parent | 17ceab92a93f5d2ef0eb26f3fd04df65e4393f9f (diff) | |
download | yosys-f589ce86bac3169281a077248af328f6758ff0eb.tar.gz yosys-f589ce86bac3169281a077248af328f6758ff0eb.tar.bz2 yosys-f589ce86bac3169281a077248af328f6758ff0eb.zip |
Add skeleton Yosys-Libero igloo2 example project
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'examples/igloo2/example.v')
-rw-r--r-- | examples/igloo2/example.v | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/examples/igloo2/example.v b/examples/igloo2/example.v new file mode 100644 index 000000000..3eb7007c5 --- /dev/null +++ b/examples/igloo2/example.v @@ -0,0 +1,22 @@ +module top ( + input clk, + output LED1, + output LED2, + output LED3, + output LED4, + output LED5 +); + + localparam BITS = 5; + localparam LOG2DELAY = 22; + + reg [BITS+LOG2DELAY-1:0] counter = 0; + reg [BITS-1:0] outcnt; + + always @(posedge clk) begin + counter <= counter + 1; + outcnt <= counter >> LOG2DELAY; + end + + assign {LED1, LED2, LED3, LED4, LED5} = outcnt ^ (outcnt >> 1); +endmodule |