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| author | Jim Lawson <ucbjrl@berkeley.edu> | 2018-08-22 08:42:34 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-08-22 08:42:34 -0700 |
| commit | 2c0601eb6f2c5ed0d376ed880efda48a2aeeb9ef (patch) | |
| tree | 02b9412c9249cce3714972c8385d66f8093bfc17 /examples/basys3/example.xdc | |
| parent | 8b92ddb9d2635c30636b17ff3d24bc09a44b8551 (diff) | |
| parent | 408077769ff022f78f10ec1ffb60926361f8dc9f (diff) | |
| download | yosys-2c0601eb6f2c5ed0d376ed880efda48a2aeeb9ef.tar.gz yosys-2c0601eb6f2c5ed0d376ed880efda48a2aeeb9ef.tar.bz2 yosys-2c0601eb6f2c5ed0d376ed880efda48a2aeeb9ef.zip | |
Merge pull request #1 from YosysHQ/master
merge with YosysHQ master
Diffstat (limited to 'examples/basys3/example.xdc')
| -rw-r--r-- | examples/basys3/example.xdc | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/examples/basys3/example.xdc b/examples/basys3/example.xdc index c1fd0e925..8cdaa1996 100644 --- a/examples/basys3/example.xdc +++ b/examples/basys3/example.xdc @@ -19,3 +19,6 @@ set_property -dict { IOSTANDARD LVCMOS33 PACKAGE_PIN L1 } [get_ports {LD[15]}] create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports CLK] +set_property CONFIG_VOLTAGE 3.3 [current_design] +set_property CFGBVS VCCO [current_design] + |