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| author | Jim Lawson <ucbjrl@berkeley.edu> | 2018-09-17 14:31:57 -0700 |
|---|---|---|
| committer | Jim Lawson <ucbjrl@berkeley.edu> | 2018-09-17 14:31:57 -0700 |
| commit | 6a809a1bb15327dfa0134b872455d47b0ebef73c (patch) | |
| tree | 1f65cca24d5309f79b19e399210d5545d2010e3c /backends | |
| parent | 036e3f9c1b62f42812cd3bdd933af7d6a8e2209c (diff) | |
| parent | 592a82c0ad8beb6de023aa2a131aab6472f949e8 (diff) | |
| download | yosys-6a809a1bb15327dfa0134b872455d47b0ebef73c.tar.gz yosys-6a809a1bb15327dfa0134b872455d47b0ebef73c.tar.bz2 yosys-6a809a1bb15327dfa0134b872455d47b0ebef73c.zip | |
Merge remote-tracking branch 'upstream/master'
Diffstat (limited to 'backends')
| -rw-r--r-- | backends/verilog/verilog_backend.cc | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/backends/verilog/verilog_backend.cc b/backends/verilog/verilog_backend.cc index 44e4e5f97..d3262ec47 100644 --- a/backends/verilog/verilog_backend.cc +++ b/backends/verilog/verilog_backend.cc @@ -779,6 +779,19 @@ bool dump_cell_expr(std::ostream &f, std::string indent, RTLIL::Cell *cell) return true; } + if (cell->type == "$lut") + { + f << stringf("%s" "assign ", indent.c_str()); + dump_sigspec(f, cell->getPort("\\Y")); + f << stringf(" = "); + dump_const(f, cell->parameters.at("\\LUT")); + f << stringf(" >> "); + dump_attributes(f, "", cell->attributes, ' '); + dump_sigspec(f, cell->getPort("\\A")); + f << stringf(";\n"); + return true; + } + if (cell->type == "$dffsr") { SigSpec sig_clk = cell->getPort("\\CLK"); |