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| author | Eddie Hung <eddie@fpgeh.com> | 2020-04-15 16:16:30 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-05-14 10:33:56 -0700 |
| commit | 4c6647a4693838978354183d5553717fa2d97a48 (patch) | |
| tree | 45d3a43a9eef1785b33b8bda2af416780424f9bd /backends | |
| parent | ec4bbb1444b24d36c03a6635738e34b652e5aa1b (diff) | |
| download | yosys-4c6647a4693838978354183d5553717fa2d97a48.tar.gz yosys-4c6647a4693838978354183d5553717fa2d97a48.tar.bz2 yosys-4c6647a4693838978354183d5553717fa2d97a48.zip | |
xaiger: always sort input/output bits by port id
redundant for normal design, but necessary for holes
Diffstat (limited to 'backends')
| -rw-r--r-- | backends/aiger/xaiger.cc | 22 |
1 files changed, 10 insertions, 12 deletions
diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc index 17a2748dc..6f0ed6e89 100644 --- a/backends/aiger/xaiger.cc +++ b/backends/aiger/xaiger.cc @@ -138,7 +138,7 @@ struct XAigerWriter return a; } - XAigerWriter(Module *module, bool dff_mode, bool holes_mode=false) : module(module), sigmap(module) + XAigerWriter(Module *module, bool dff_mode) : module(module), sigmap(module) { pool<SigBit> undriven_bits; pool<SigBit> unused_bits; @@ -411,16 +411,14 @@ struct XAigerWriter undriven_bits.erase(bit); } - if (holes_mode) { - struct sort_by_port_id { - bool operator()(const RTLIL::SigBit& a, const RTLIL::SigBit& b) const { - return a.wire->port_id < b.wire->port_id || - (a.wire->port_id == b.wire->port_id && a.offset < b.offset); - } - }; - input_bits.sort(sort_by_port_id()); - output_bits.sort(sort_by_port_id()); - } + struct sort_by_port_id { + bool operator()(const RTLIL::SigBit& a, const RTLIL::SigBit& b) const { + return a.wire->port_id < b.wire->port_id || + (a.wire->port_id == b.wire->port_id && a.offset < b.offset); + } + }; + input_bits.sort(sort_by_port_id()); + output_bits.sort(sort_by_port_id()); aig_map[State::S0] = 0; aig_map[State::S1] = 1; @@ -685,7 +683,7 @@ struct XAigerWriter RTLIL::Module *holes_module = holes_design ? holes_design->module(module->name) : nullptr; if (holes_module) { std::stringstream a_buffer; - XAigerWriter writer(holes_module, false /* dff_mode */, true /* holes_mode */); + XAigerWriter writer(holes_module, false /* dff_mode */); writer.write_aiger(a_buffer, false /*ascii_mode*/); f << "a"; |