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authorUdi Finkelstein <github@udifink.com>2018-09-18 01:27:01 +0300
committerUdi Finkelstein <github@udifink.com>2018-09-18 01:27:01 +0300
commitc693f595c53e2e40840ff40b5b5ba06767582d23 (patch)
treede5e3f353f3222abca7186996e88cd9d635a964b /backends/spice/spice.cc
parentf6fe73b31f6e6d8966ad4ddae860b4d79133cce2 (diff)
parent592a82c0ad8beb6de023aa2a131aab6472f949e8 (diff)
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Merge branch 'master' into pr_reg_wire_error
Diffstat (limited to 'backends/spice/spice.cc')
-rw-r--r--backends/spice/spice.cc4
1 files changed, 2 insertions, 2 deletions
diff --git a/backends/spice/spice.cc b/backends/spice/spice.cc
index 4101cbf98..b6a3f1e77 100644
--- a/backends/spice/spice.cc
+++ b/backends/spice/spice.cc
@@ -132,7 +132,7 @@ static void print_spice_module(std::ostream &f, RTLIL::Module *module, RTLIL::De
struct SpiceBackend : public Backend {
SpiceBackend() : Backend("spice", "write design to SPICE netlist file") { }
- virtual void help()
+ void help() YS_OVERRIDE
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
log("\n");
@@ -161,7 +161,7 @@ struct SpiceBackend : public Backend {
log(" set the specified module as design top module\n");
log("\n");
}
- virtual void execute(std::ostream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design)
+ void execute(std::ostream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
{
std::string top_module_name;
RTLIL::Module *top_module = NULL;