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author | Clifford Wolf <clifford@clifford.at> | 2016-10-14 12:33:56 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2016-10-14 12:33:56 +0200 |
commit | 53655d173b2928328061c8440cc993508e951e1f (patch) | |
tree | 87c12bdeb1a7cde96569efd1da18bee909b2f115 /backends/ilang/ilang_backend.cc | |
parent | ffbb4e992e5312d8feafcc1c6c850ea06c3e09b2 (diff) | |
download | yosys-53655d173b2928328061c8440cc993508e951e1f.tar.gz yosys-53655d173b2928328061c8440cc993508e951e1f.tar.bz2 yosys-53655d173b2928328061c8440cc993508e951e1f.zip |
Added $global_clock verilog syntax support for creating $ff cells
Diffstat (limited to 'backends/ilang/ilang_backend.cc')
-rw-r--r-- | backends/ilang/ilang_backend.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/backends/ilang/ilang_backend.cc b/backends/ilang/ilang_backend.cc index 03e29c524..14e15017d 100644 --- a/backends/ilang/ilang_backend.cc +++ b/backends/ilang/ilang_backend.cc @@ -228,6 +228,7 @@ void ILANG_BACKEND::dump_proc_sync(std::ostream &f, std::string indent, const RT f << stringf("\n"); break; case RTLIL::STa: f << stringf("always\n"); break; + case RTLIL::STg: f << stringf("global\n"); break; case RTLIL::STi: f << stringf("init\n"); break; } |