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| author | Clifford Wolf <clifford@clifford.at> | 2013-07-04 14:17:25 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2013-07-04 14:17:25 +0200 |
| commit | a4fd3cde8cb93f43f5fa0082cf244eb280a2581c (patch) | |
| tree | 53e075bced89562646e685033476e4bbf08b9ba2 /README | |
| parent | 56432a920f9c2189ead2f724f18cde20aad7bf99 (diff) | |
| download | yosys-a4fd3cde8cb93f43f5fa0082cf244eb280a2581c.tar.gz yosys-a4fd3cde8cb93f43f5fa0082cf244eb280a2581c.tar.bz2 yosys-a4fd3cde8cb93f43f5fa0082cf244eb280a2581c.zip | |
Documentation updates
Diffstat (limited to 'README')
| -rw-r--r-- | README | 7 |
1 files changed, 2 insertions, 5 deletions
@@ -245,7 +245,6 @@ TODOs / Open Bugs - Indexed part selects - Multi-dimensional arrays - ROM modeling using "initial" blocks - - The "defparam <cell_name>.<parameter_name> = <value>;" syntax - Built-in primitive gates (and, nand, cmos, nmos, pmos, etc..) - Ignore what needs to be ignored (e.g. drive and charge strengths) - Check standard vs. implementation to identify missing features @@ -255,11 +254,9 @@ TODOs / Open Bugs - Actually use range information on parameters - Add brief source code documentation to most passes and kernel code - Implement mux-to-tribuf pass and rebalance mixed mux/tribuf trees - - Add 'edit' command for changing the design (delete, add, modify objects) - - Improve TCL support and add 'list' command for inspecting the design from TCL + - Add edit commands for changing the design (delete, add, modify objects) + - Improve TCL support (add mechanism for inspecting the design from TCL) - Additional internal cell types: $pla and $lut - Support for registering designs (as collection of modules) to CellTypes - Smarter resource sharing pass (add MUXes and get rid of duplicated cells) - - For pass' "fsm_detect" help: add notes what criteria lets it detect an FSM - - Better FSM state encoding |