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authorPeter Crozier <peter@crozier.com>2020-05-08 14:40:49 +0100
committerPeter Crozier <peter@crozier.com>2020-05-08 14:40:49 +0100
commit0b6b47ca670b9219bcb81ab7d3599267c2ef7571 (patch)
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Implement SV structs.
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@@ -556,6 +556,8 @@ from SystemVerilog:
- enums are supported (including inside packages)
- but are currently not strongly typed
+- structs are supported
+
- SystemVerilog interfaces (SVIs) are supported. Modports for specifying whether
ports are inputs or outputs are supported.