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authorMiodrag Milanović <mmicko@gmail.com>2019-10-18 10:51:32 +0200
committerGitHub <noreply@github.com>2019-10-18 10:51:32 +0200
commite0a67fce12647b4db7125d33264847c0a3781105 (patch)
tree38f3dc5651aa6bab8afb3217a90a7c0350ef23ae /Makefile
parent0d037bf9d8d866239de15d72dc8c5acd7ab5e5cf (diff)
parente6ad714d20134612521e995c72e4fa06ed791dd3 (diff)
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Merge pull request #1420 from YosysHQ/eddie/pr1363
Add tests for Xilinx architecture (contd)
Diffstat (limited to 'Makefile')
-rw-r--r--Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/Makefile b/Makefile
index 895cfbf89..6f5184596 100644
--- a/Makefile
+++ b/Makefile
@@ -715,6 +715,7 @@ test: $(TARGETS) $(EXTRA_TARGETS)
+cd tests/arch && bash run-test.sh
+cd tests/ice40 && bash run-test.sh $(SEEDOPT)
+cd tests/rpc && bash run-test.sh
+ +cd tests/xilinx && bash run-test.sh $(SEEDOPT)
@echo ""
@echo " Passed \"make test\"."
@echo ""