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| author | Eddie Hung <eddie@fpgeh.com> | 2019-09-20 12:21:36 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-20 12:21:36 -0700 |
| commit | 3fb839e2555755d29cb8304af9a9cc10d1f5e5ef (patch) | |
| tree | 81978ed22a9511e259c7c37ffc80e061b2846d84 /CHANGELOG | |
| parent | eb597431f03cb402db4fc8a514c031efc29e6580 (diff) | |
| parent | f3781f98db227f160e08b2fc7cf8c61f663a56c9 (diff) | |
| download | yosys-3fb839e2555755d29cb8304af9a9cc10d1f5e5ef.tar.gz yosys-3fb839e2555755d29cb8304af9a9cc10d1f5e5ef.tar.bz2 yosys-3fb839e2555755d29cb8304af9a9cc10d1f5e5ef.zip | |
Merge remote-tracking branch 'origin/master' into xc7dsp
Diffstat (limited to 'CHANGELOG')
| -rw-r--r-- | CHANGELOG | 2 |
1 files changed, 2 insertions, 0 deletions
@@ -41,6 +41,8 @@ Yosys 0.9 .. Yosys 0.9-dev - Removed "shregmap -tech xilinx" (superseded by "xilinx_srl") - Added "_TECHMAP_WIREINIT_*_" attribute and "_TECHMAP_REMOVEINIT_*_" wire for "techmap" pass - Added "-match-init" option to "dff2dffs" pass + - Added "techmap_autopurge" support to techmap + - Added "add -mod <modname[s]>" - Added +/mul2dsp.v for decomposing wide multipliers to custom-sized ones - Added "ice40_dsp" for Lattice iCE40 DSP packing - Added "xilinx_dsp" for Xilinx DSP packing |