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| author | Bogdan Vukobratovic <bogdan.vukobratovic@gmail.com> | 2019-06-27 12:11:47 +0200 |
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| committer | Bogdan Vukobratovic <bogdan.vukobratovic@gmail.com> | 2019-06-27 12:11:47 +0200 |
| commit | 0f32cb4e0af85e16a90ae274cf7c9fee6fbd2ad7 (patch) | |
| tree | 9ed03b8345847046143161c3a63b8fa599393da2 /CHANGELOG | |
| parent | 2454ad99bf49afe752d6fd1c1567f59ee9e26736 (diff) | |
| parent | 0d2b87e3ed9bacae7d44d27a4712e56ca03c8dd3 (diff) | |
| download | yosys-0f32cb4e0af85e16a90ae274cf7c9fee6fbd2ad7.tar.gz yosys-0f32cb4e0af85e16a90ae274cf7c9fee6fbd2ad7.tar.bz2 yosys-0f32cb4e0af85e16a90ae274cf7c9fee6fbd2ad7.zip | |
Merge remote-tracking branch 'upstream/master'
Diffstat (limited to 'CHANGELOG')
| -rw-r--r-- | CHANGELOG | 8 |
1 files changed, 6 insertions, 2 deletions
@@ -17,8 +17,12 @@ Yosys 0.8 .. Yosys 0.8-dev - Added "rename -src" - Added "equiv_opt" pass - Added "read_aiger" frontend - - Extended "muxcover -mux{4,8,16}=<cost>" + - Added "muxcover -mux{4,8,16}=<cost>" + - Added "muxcover -dmux=<cost>" + - Added "muxcover -nopartial" + - Added "muxpack" pass - "synth_xilinx" to now infer hard shift registers, using new "shregmap -tech xilinx" + - Fixed sign extension of unsized constants with 'bx and 'bz MSB Yosys 0.7 .. Yosys 0.8 @@ -32,7 +36,7 @@ Yosys 0.7 .. Yosys 0.8 - Added "write_verilog -decimal" - Added "scc -set_attr" - Added "verilog_defines" command - - Remeber defines from one read_verilog to next + - Remember defines from one read_verilog to next - Added support for hierarchical defparam - Added FIRRTL back-end - Improved ABC default scripts |