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| author | Eddie Hung <eddie@fpgeh.com> | 2019-09-30 19:54:04 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-30 19:54:04 -0700 |
| commit | f8d5e11aa7285fc92832b87063d530afe27eca28 (patch) | |
| tree | 8ccc5b571f95a58b3fb2f43b029a77c1c7cb2f53 | |
| parent | d992858318c9fae869a7d0d4ed046ed8c5ea5811 (diff) | |
| download | yosys-f8d5e11aa7285fc92832b87063d530afe27eca28.tar.gz yosys-f8d5e11aa7285fc92832b87063d530afe27eca28.tar.bz2 yosys-f8d5e11aa7285fc92832b87063d530afe27eca28.zip | |
Update resource count for alu.ys
| -rw-r--r-- | tests/ecp5/alu.ys | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/tests/ecp5/alu.ys b/tests/ecp5/alu.ys index d10cd63b2..c2950b164 100644 --- a/tests/ecp5/alu.ys +++ b/tests/ecp5/alu.ys @@ -6,8 +6,8 @@ equiv_opt -assert -map +/ecp5/cells_sim.v synth_ecp5 # equivalency check design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) cd top # Constrain all select calls below inside the top module select -assert-count 32 t:CCU2C -select -assert-count 253 t:L6MUX21 -select -assert-count 1150 t:LUT4 -select -assert-count 423 t:PFUMX +select -assert-count 242 t:L6MUX21 +select -assert-count 1127 t:LUT4 +select -assert-count 417 t:PFUMX select -assert-count 32 t:TRELLIS_FF select -assert-none t:CCU2C t:L6MUX21 t:LUT4 t:PFUMX t:TRELLIS_FF %% t:* %D |