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| author | Clifford Wolf <clifford@clifford.at> | 2014-07-27 09:20:59 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-07-27 09:20:59 +0200 |
| commit | ddc5b4184836e795e143fc00786b4b87a6e69bc4 (patch) | |
| tree | d967e01d859ba7ce8a44dd1e9c643c6d1a74fb17 | |
| parent | 7f3dc86ecd00a9ed5f5b7f09e02a6fe584259f79 (diff) | |
| download | yosys-ddc5b4184836e795e143fc00786b4b87a6e69bc4.tar.gz yosys-ddc5b4184836e795e143fc00786b4b87a6e69bc4.tar.bz2 yosys-ddc5b4184836e795e143fc00786b4b87a6e69bc4.zip | |
Using std::move() in SigSpec move constructor
| -rw-r--r-- | kernel/rtlil.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/kernel/rtlil.h b/kernel/rtlil.h index 97d01617a..91c9a1baa 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -628,15 +628,15 @@ public: SigSpec(RTLIL::SigSpec &&other) { width_ = other.width_; hash_ = other.hash_; - chunks_.swap(other.chunks_); - bits_.swap(other.bits_); + chunks_ = std::move(other.chunks_); + bits_ = std::move(other.bits_); } const RTLIL::SigSpec &operator=(RTLIL::SigSpec &&other) { width_ = other.width_; hash_ = other.hash_; - chunks_.swap(other.chunks_); - bits_.swap(other.bits_); + chunks_ = std::move(other.chunks_); + bits_ = std::move(other.bits_); return *this; } |