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authorEddie Hung <eddie@fpgeh.com>2020-01-09 14:03:43 -0800
committerEddie Hung <eddie@fpgeh.com>2020-01-09 14:03:43 -0800
commitceabd5bc3984a0ff088d697ac8ba7061b4f552fb (patch)
treef115b4400b533967f1697e87d3cedfb89e45e094
parent73d89b39640fdea19d24af9b87967ae225af5390 (diff)
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write_xaiger: cleanup
-rw-r--r--backends/aiger/xaiger.cc32
1 files changed, 15 insertions, 17 deletions
diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc
index 1956422bc..cde53ff63 100644
--- a/backends/aiger/xaiger.cc
+++ b/backends/aiger/xaiger.cc
@@ -243,23 +243,21 @@ struct XAigerWriter
if (port_wire->port_output) {
arrivals.clear();
auto it = port_wire->attributes.find("\\abc9_arrival");
- if (it != port_wire->attributes.end()) {
- if (it->second.flags == 0)
- arrivals.emplace_back(it->second.as_int());
- else
- for (const auto &tok : split_tokens(it->second.decode_string()))
- arrivals.push_back(atoi(tok.c_str()));
- }
- if (!arrivals.empty()) {
- if (GetSize(arrivals) > 1 && GetSize(arrivals) != GetSize(port_wire))
- log_error("%s.%s is %d bits wide but abc9_arrival = %s has %d value(s)!\n", log_id(cell->type), log_id(conn.first),
- GetSize(port_wire), log_signal(it->second), GetSize(arrivals));
- auto jt = arrivals.begin();
- for (auto bit : sigmap(conn.second)) {
- arrival_times[bit] = *jt;
- if (arrivals.size() > 1)
- jt++;
- }
+ if (it == port_wire->attributes.end())
+ continue;
+ if (it->second.flags == 0)
+ arrivals.emplace_back(it->second.as_int());
+ else
+ for (const auto &tok : split_tokens(it->second.decode_string()))
+ arrivals.push_back(atoi(tok.c_str()));
+ if (GetSize(arrivals) > 1 && GetSize(arrivals) != GetSize(port_wire))
+ log_error("%s.%s is %d bits wide but abc9_arrival = %s has %d value(s)!\n", log_id(cell->type), log_id(conn.first),
+ GetSize(port_wire), log_signal(it->second), GetSize(arrivals));
+ auto jt = arrivals.begin();
+ for (auto bit : sigmap(conn.second)) {
+ arrival_times[bit] = *jt;
+ if (arrivals.size() > 1)
+ jt++;
}
}
}