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author | Jannis Harder <me@jix.one> | 2023-01-29 13:54:02 +0100 |
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committer | Jannis Harder <me@jix.one> | 2023-01-29 14:02:25 +0100 |
commit | b08a8807044980b7906362848f62291ede50e696 (patch) | |
tree | daafa09056ad4efef3860a883b9f52843a91670c | |
parent | 541fdffff243bccb410de13ae3ef91797060fcd4 (diff) | |
download | yosys-b08a8807044980b7906362848f62291ede50e696.tar.gz yosys-b08a8807044980b7906362848f62291ede50e696.tar.bz2 yosys-b08a8807044980b7906362848f62291ede50e696.zip |
backends/rtlil: Do not shorten a value with z bits to 'x
-rw-r--r-- | backends/rtlil/rtlil_backend.cc | 2 | ||||
-rw-r--r-- | kernel/rtlil.cc | 11 | ||||
-rw-r--r-- | kernel/rtlil.h | 1 | ||||
-rw-r--r-- | tests/various/rtlil_z_bits.ys | 9 |
4 files changed, 22 insertions, 1 deletions
diff --git a/backends/rtlil/rtlil_backend.cc b/backends/rtlil/rtlil_backend.cc index 7c7e26a93..574eb3aaa 100644 --- a/backends/rtlil/rtlil_backend.cc +++ b/backends/rtlil/rtlil_backend.cc @@ -51,7 +51,7 @@ void RTLIL_BACKEND::dump_const(std::ostream &f, const RTLIL::Const &data, int wi } } f << stringf("%d'", width); - if (data.is_fully_undef()) { + if (data.is_fully_undef_x_only()) { f << "x"; } else { for (int i = offset+width-1; i >= offset; i--) { diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index eee014c54..7f3508b2f 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -370,6 +370,17 @@ bool RTLIL::Const::is_fully_undef() const return true; } +bool RTLIL::Const::is_fully_undef_x_only() const +{ + cover("kernel.rtlil.const.is_fully_undef_x_only"); + + for (const auto &bit : bits) + if (bit != RTLIL::State::Sx) + return false; + + return true; +} + bool RTLIL::Const::is_onehot(int *pos) const { cover("kernel.rtlil.const.is_onehot"); diff --git a/kernel/rtlil.h b/kernel/rtlil.h index 42bb66da8..7c7669caa 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -686,6 +686,7 @@ struct RTLIL::Const bool is_fully_ones() const; bool is_fully_def() const; bool is_fully_undef() const; + bool is_fully_undef_x_only() const; bool is_onehot(int *pos = nullptr) const; inline RTLIL::Const extract(int offset, int len = 1, RTLIL::State padding = RTLIL::State::S0) const { diff --git a/tests/various/rtlil_z_bits.ys b/tests/various/rtlil_z_bits.ys new file mode 100644 index 000000000..c38669159 --- /dev/null +++ b/tests/various/rtlil_z_bits.ys @@ -0,0 +1,9 @@ +! mkdir -p temp +read_rtlil <<EOT +module \test + wire output 1 \a + connect \a 1'z +end +EOT +write_rtlil temp/rtlil_z_bits.il +! grep -F -q "connect \\a 1'z" temp/rtlil_z_bits.il |