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author | Eddie Hung <eddie@fpgeh.com> | 2019-05-29 15:24:38 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-05-29 15:24:38 -0700 |
commit | aa2380c17a7c97d4c3835cd6d78310cf4961c4f8 (patch) | |
tree | 6ccbc9fede53bc92316f1b2b550d812730eb91ed | |
parent | 1423384367d4fa31f09c6c7b69c1b89edc3dd066 (diff) | |
download | yosys-aa2380c17a7c97d4c3835cd6d78310cf4961c4f8.tar.gz yosys-aa2380c17a7c97d4c3835cd6d78310cf4961c4f8.tar.bz2 yosys-aa2380c17a7c97d4c3835cd6d78310cf4961c4f8.zip |
Add abc_test024
-rw-r--r-- | tests/simple_abc9/abc9.v | 25 |
1 files changed, 19 insertions, 6 deletions
diff --git a/tests/simple_abc9/abc9.v b/tests/simple_abc9/abc9.v index e666d1a6a..7af2ace01 100644 --- a/tests/simple_abc9/abc9.v +++ b/tests/simple_abc9/abc9.v @@ -230,10 +230,23 @@ module abc9_test022 input wire i, output wire [7:0] m_eth_payload_axis_tkeep ); - -reg [7:0] m_eth_payload_axis_tkeep_reg = 8'd0; -assign m_eth_payload_axis_tkeep = m_eth_payload_axis_tkeep_reg; -always @(posedge clk) - m_eth_payload_axis_tkeep_reg <= i ? 8'hff : 8'h0f; - + reg [7:0] m_eth_payload_axis_tkeep_reg = 8'd0; + assign m_eth_payload_axis_tkeep = m_eth_payload_axis_tkeep_reg; + always @(posedge clk) + m_eth_payload_axis_tkeep_reg <= i ? 8'hff : 8'h0f; +endmodule + +// Citation: https://github.com/riscv/riscv-bitmanip +// TODO: yosys -p "synth_xilinx -abc9 -top abc9_test024" abc9.v -q +// returns before 14233843 +// Warning: Wire abc9_test024.\dout [1] is used but has no driver. +module abc9_test024 #( + parameter integer N = 2, + parameter integer M = 2 +) ( + input [7:0] din, + output [M-1:0] dout +); + wire [2*M-1:0] mask = {M{1'b1}}; + assign dout = (mask << din[N-1:0]) >> M; endmodule |