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authorClifford Wolf <clifford@clifford.at>2019-03-22 18:03:06 +0100
committerGitHub <noreply@github.com>2019-03-22 18:03:06 +0100
commita440f82586eda461ae2a90cba7a14d7078c41f37 (patch)
tree10eb988328a6301110c6194aa763fb318938e664
parent7d8d0d0155d46d30d21d95325df7f99b36058a96 (diff)
parent638be461c3a6d33aa294700249ee0bc27da69403 (diff)
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Merge pull request #889 from YosysHQ/clifford/fix888
Fix mem2reg handling of memories with upto data ports
-rw-r--r--frontends/ast/simplify.cc11
1 files changed, 10 insertions, 1 deletions
diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc
index d525c6b8a..63b71b800 100644
--- a/frontends/ast/simplify.cc
+++ b/frontends/ast/simplify.cc
@@ -138,9 +138,15 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
int mem_width, mem_size, addr_bits;
node->meminfo(mem_width, mem_size, addr_bits);
+ int data_range_left = node->children[0]->range_left;
+ int data_range_right = node->children[0]->range_right;
+
+ if (node->children[0]->range_swapped)
+ std::swap(data_range_left, data_range_right);
+
for (int i = 0; i < mem_size; i++) {
AstNode *reg = new AstNode(AST_WIRE, new AstNode(AST_RANGE,
- mkconst_int(mem_width-1, true), mkconst_int(0, true)));
+ mkconst_int(data_range_left, true), mkconst_int(data_range_right, true)));
reg->str = stringf("%s[%d]", node->str.c_str(), i);
reg->is_reg = true;
reg->is_signed = node->is_signed;
@@ -976,6 +982,9 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
int data_range_left = id2ast->children[0]->range_left;
int data_range_right = id2ast->children[0]->range_right;
+ if (id2ast->children[0]->range_swapped)
+ std::swap(data_range_left, data_range_right);
+
std::stringstream sstr;
sstr << "$mem2bits$" << str << "$" << filename << ":" << linenum << "$" << (autoidx++);
std::string wire_id = sstr.str();