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| author | Eddie Hung <eddie@fpgeh.com> | 2020-01-17 15:28:02 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-01-17 15:28:02 -0800 |
| commit | 6692e5d558e7c7277153b7a3bd1623af0e57405d (patch) | |
| tree | eca40fdd6eafde47c1b0aab3d45136795801b051 | |
| parent | 2bda51ac34d6f542d1d6477eecede1d6527c10b3 (diff) | |
| download | yosys-6692e5d558e7c7277153b7a3bd1623af0e57405d.tar.gz yosys-6692e5d558e7c7277153b7a3bd1623af0e57405d.tar.bz2 yosys-6692e5d558e7c7277153b7a3bd1623af0e57405d.zip | |
ice40_dsp: tolerant of fanout-less outputs, as well as all-zero inputs
| -rw-r--r-- | passes/pmgen/ice40_dsp.pmg | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/passes/pmgen/ice40_dsp.pmg b/passes/pmgen/ice40_dsp.pmg index 6b6d2b56f..9514e65d9 100644 --- a/passes/pmgen/ice40_dsp.pmg +++ b/passes/pmgen/ice40_dsp.pmg @@ -57,6 +57,9 @@ code sigA sigB sigH sigH.append(O[i]); } log_assert(nusers(O.extract_end(i)) <= 1); + + if (sigH.empty()) + reject; endcode code argQ ffA ffAholdmux ffArstmux ffAholdpol ffArstpol sigA clock clock_pol @@ -328,6 +331,8 @@ arg argD argQ clock clock_pol code dff = nullptr; + if (argQ.empty()) + reject; for (auto c : argQ.chunks()) { if (!c.wire) reject; |