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| author | Dan Ravensloft <dan.ravensloft@gmail.com> | 2021-03-05 21:45:11 +0000 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2021-03-06 00:10:28 +0100 |
| commit | 55e5bd4213c8065994fb916e72105d822bd4175a (patch) | |
| tree | 4957a00de2ddce79b4f372085369d640f52e064c | |
| parent | 9dd813374ea43e804cb3f86d8390bff46a8bcb8c (diff) | |
| download | yosys-55e5bd4213c8065994fb916e72105d822bd4175a.tar.gz yosys-55e5bd4213c8065994fb916e72105d822bd4175a.tar.bz2 yosys-55e5bd4213c8065994fb916e72105d822bd4175a.zip | |
Replace assert in addModule with more useful error message
| -rw-r--r-- | kernel/rtlil.cc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index 1faf376e7..40079ffc5 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -613,7 +613,8 @@ void RTLIL::Design::add(RTLIL::Module *module) RTLIL::Module *RTLIL::Design::addModule(RTLIL::IdString name) { - log_assert(modules_.count(name) == 0); + if (modules_.count(name) != 0) + log_error("Attempted to add new module named '%s', but a module by that name already exists\n", name.c_str()); log_assert(refcount_modules_ == 0); RTLIL::Module *module = new RTLIL::Module; |