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| author | Eddie Hung <eddie@fpgeh.com> | 2019-05-21 14:31:19 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-05-21 14:31:19 -0700 |
| commit | 36a219063ad7b4e70581bf83a00365db764737bf (patch) | |
| tree | 13f467cdcabe60bf91d2adf2e0269bd72a0cda14 | |
| parent | fb09c6219b057100d2e43028ec710888c20924fd (diff) | |
| download | yosys-36a219063ad7b4e70581bf83a00365db764737bf.tar.gz yosys-36a219063ad7b4e70581bf83a00365db764737bf.tar.bz2 yosys-36a219063ad7b4e70581bf83a00365db764737bf.zip | |
Modify LUT area cost to be same as old abc
| -rw-r--r-- | techlibs/xilinx/abc.lut | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/techlibs/xilinx/abc.lut b/techlibs/xilinx/abc.lut index c6bc7b1f7..c53cd50a1 100644 --- a/techlibs/xilinx/abc.lut +++ b/techlibs/xilinx/abc.lut @@ -1,12 +1,11 @@ -# Max delays from https://pastebin.com/v2hrcksd -# from https://github.com/SymbiFlow/prjxray/pull/706#issuecomment-479380321 +# Max delays from https://github.com/SymbiFlow/prjxray-db/blob/34ea6eb08a63d21ec16264ad37a0a7b142ff6031/artix7/timings/CLBLL_L.sdf # K area delay -1 11 624 -2 12 624 -3 13 624 -4 14 624 -5 15 624 -6 20 724 -7 40 1020 -8 80 1293 +1 1 624 +2 2 624 +3 3 624 +4 3 624 +5 3 624 +6 5 724 +7 10 1020 +8 20 1293 |