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authorEddie Hung <eddie@fpgeh.com>2019-05-29 22:55:34 -0700
committerEddie Hung <eddie@fpgeh.com>2019-05-29 22:55:34 -0700
commit276f5f8b811953e79923fe30e85bc34ced88b748 (patch)
treece70745ecc72c2b6e393a1040aff0a070b0e58a0
parent854557814ee2cd3902e5871cb0b559ee375e81c5 (diff)
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Some more realistic delays...
-rw-r--r--techlibs/xilinx/abc.lut14
1 files changed, 7 insertions, 7 deletions
diff --git a/techlibs/xilinx/abc.lut b/techlibs/xilinx/abc.lut
index 5550a4039..3a7dc268d 100644
--- a/techlibs/xilinx/abc.lut
+++ b/techlibs/xilinx/abc.lut
@@ -2,13 +2,13 @@
# K area delay
1 1 124
-2 2 124 248
-3 3 124 248 372
-4 3 124 248 372 496
-5 3 124 248 372 496 620
-6 5 124 248 372 496 620 744
+2 2 124 235
+3 3 124 235 399
+4 3 124 235 399 490
+5 3 124 235 399 490 620
+6 5 124 235 399 490 620 632
# F7BMUX
-7 10 296 420 544 668 792 916 1040
+7 10 296 420 531 695 756 916 928
# F8MUX
# F8MUX+F7BMUX
-8 20 273 569 693 817 941 1065 1189 1313
+8 20 273 569 693 804 968 1029 1189 1201