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authorClifford Wolf <clifford@clifford.at>2019-06-04 14:37:10 +0200
committerGitHub <noreply@github.com>2019-06-04 14:37:10 +0200
commit1332051f331108e73ac468f226034720bd856281 (patch)
tree49c5868f2fceee64610d53396432def3dd45783b
parent1217e47e83d099561fed933208621d0402cf0972 (diff)
parentc66d644b66f13d5cc54c78051bf97c0143d9940e (diff)
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Merge pull request #1062 from tux3/patch-1
README.md: Missing formatting for <tag>
-rw-r--r--README.md2
1 files changed, 1 insertions, 1 deletions
diff --git a/README.md b/README.md
index 19306cda3..94ea9538f 100644
--- a/README.md
+++ b/README.md
@@ -413,7 +413,7 @@ Verilog Attributes and non-standard features
$ yosys -p 'plugin -a foo -i /lib/libm.so; read_verilog dpitest.v'
- Sized constants (the syntax ``<size>'s?[bodh]<value>``) support constant
- expressions as <size>. If the expression is not a simple identifier, it
+ expressions as ``<size>``. If the expression is not a simple identifier, it
must be put in parentheses. Examples: ``WIDTH'd42``, ``(4+2)'b101010``
- The system tasks ``$finish``, ``$stop`` and ``$display`` are supported in