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| author | Clifford Wolf <clifford@clifford.at> | 2019-05-27 13:24:19 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-05-27 13:24:19 +0200 |
| commit | 2a9c68e2d6e0d58ac9e1ef8e8eb4c21eb979b380 (patch) | |
| tree | e68672f6a6b667fc1561905ed1f0078c08cc81b7 /.travis | |
| parent | da140dd2602a049a94473f5f262189b22e19c185 (diff) | |
| parent | e3f9ccf56d65ba72dfa625e9716d1182f36a381e (diff) | |
| download | yosys-2a9c68e2d6e0d58ac9e1ef8e8eb4c21eb979b380.tar.gz yosys-2a9c68e2d6e0d58ac9e1ef8e8eb4c21eb979b380.tar.bz2 yosys-2a9c68e2d6e0d58ac9e1ef8e8eb4c21eb979b380.zip | |
Merge pull request #1026 from YosysHQ/clifford/fix1023
Keep zero-width wires in opt_clean if and only if they are ports
Diffstat (limited to '.travis')
0 files changed, 0 insertions, 0 deletions