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| author | Andrew Zonenberg <azonenberg@drawersteak.com> | 2017-08-11 16:16:25 -0700 |
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| committer | Andrew Zonenberg <azonenberg@drawersteak.com> | 2017-08-14 10:28:16 -0700 |
| commit | 2877d5e50449dd08ebcb183218d015008c9fffcb (patch) | |
| tree | df4a19e09599aa03761bfb49214a1a2178cb0565 /.travis.yml | |
| parent | 3dd7f42e2b07c84178c648a0c3979c61fe25f68f (diff) | |
| download | yosys-2877d5e50449dd08ebcb183218d015008c9fffcb.tar.gz yosys-2877d5e50449dd08ebcb183218d015008c9fffcb.tar.bz2 yosys-2877d5e50449dd08ebcb183218d015008c9fffcb.zip | |
Fixed handling of cell ports that aren't wires
Diffstat (limited to '.travis.yml')
0 files changed, 0 insertions, 0 deletions