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/*
 *  nextpnr -- Next Generation Place and Route
 *
 *  Copyright (C) 2018  Claire Xenia Wolf <claire@yosyshq.com>
 *  Copyright (C) 2018  Serge Bazanski <q3k@q3k.org>
 *
 *  Permission to use, copy, modify, and/or distribute this software for any
 *  purpose with or without fee is hereby granted, provided that the above
 *  copyright notice and this permission notice appear in all copies.
 *
 *  THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 *
 */

#include "idstring.h"

#include "basectx.h"

NEXTPNR_NAMESPACE_BEGIN

void IdString::set(const BaseCtx *ctx, const std::string &s)
{
    auto it = ctx->idstring_str_to_idx->find(s);
    if (it == ctx->idstring_str_to_idx->end()) {
        index = ctx->idstring_idx_to_str->size();
        auto insert_rc = ctx->idstring_str_to_idx->insert({s, index});
        ctx->idstring_idx_to_str->push_back(&insert_rc.first->first);
    } else {
        index = it->second;
    }
}

const std::string &IdString::str(const BaseCtx *ctx) const { return *ctx->idstring_idx_to_str->at(index); }

const char *IdString::c_str(const BaseCtx *ctx) const { return str(ctx).c_str(); }

void IdString::initialize_add(const BaseCtx *ctx, const char *s, int idx)
{
    NPNR_ASSERT(ctx->idstring_str_to_idx->count(s) == 0);
    NPNR_ASSERT(int(ctx->idstring_idx_to_str->size()) == idx);
    auto insert_rc = ctx->idstring_str_to_idx->insert({s, idx});
    ctx->idstring_idx_to_str->push_back(&insert_rc.first->first);
}

NEXTPNR_NAMESPACE_END
>{ struct spi_command cmd[] = { { .writecnt = writecnt, .readcnt = readcnt, .writearr = writearr, .readarr = readarr, }, { .writecnt = 0, .writearr = NULL, .readcnt = 0, .readarr = NULL, }}; return spi_send_multicommand(flash, cmd); } int default_spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds) { int result = 0; for (; (cmds->writecnt || cmds->readcnt) && !result; cmds++) { result = spi_send_command(flash, cmds->writecnt, cmds->readcnt, cmds->writearr, cmds->readarr); } return result; } int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) { unsigned int max_data = flash->mst->spi.max_data_read; if (max_data == MAX_DATA_UNSPECIFIED) { msg_perr("%s called, but SPI read chunk size not defined " "on this hardware. Please report a bug at " "flashrom@flashrom.org\n", __func__); return 1; } return spi_read_chunked(flash, buf, start, len, max_data); } int default_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len) { unsigned int max_data = flash->mst->spi.max_data_write; if (max_data == MAX_DATA_UNSPECIFIED) { msg_perr("%s called, but SPI write chunk size not defined " "on this hardware. Please report a bug at " "flashrom@flashrom.org\n", __func__); return 1; } return spi_write_chunked(flash, buf, start, len, max_data); } int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) { int ret; size_t to_read; for (; len; len -= to_read, buf += to_read, start += to_read) { /* Do not cross 16MiB boundaries in a single transfer. This helps with o multi-die 4-byte-addressing chips, o dediprog that has a protocol limit of 32MiB-512B. */ to_read = min(ALIGN_DOWN(start + 16*MiB, 16*MiB) - start, len); ret = flash->mst->spi.read(flash, buf, start, to_read); if (ret) return ret; } return 0; } /* * Program chip using page (256 bytes) programming. * Some SPI masters can't do this, they use single byte programming instead. * The redirect to single byte programming is achieved by setting * .write_256 = spi_chip_write_1 */ /* real chunksize is up to 256, logical chunksize is 256 */ int spi_chip_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len) { return flash->mst->spi.write_256(flash, buf, start, len); } int spi_aai_write(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len) { return flash->mst->spi.write_aai(flash, buf, start, len); } int register_spi_master(const struct spi_master *mst) { struct registered_master rmst; if (!mst->write_aai || !mst->write_256 || !mst->read || !mst->command || !mst->multicommand || ((mst->command == default_spi_send_command) && (mst->multicommand == default_spi_send_multicommand))) { msg_perr("%s called with incomplete master definition. " "Please report a bug at flashrom@flashrom.org\n", __func__); return ERROR_FLASHROM_BUG; } rmst.buses_supported = BUS_SPI; rmst.spi = *mst; return register_master(&rmst); }