| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | mistral: Updated CLK mux select name | gatecat | 2022-03-18 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: Update to latest upstream | gatecat | 2022-03-17 | 1 | -11/+17 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: M10K initialisation support | Lofty | 2022-03-12 | 1 | -2/+17 |
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| * | mistral: fixes and debug info | Lofty | 2022-03-09 | 1 | -10/+11 |
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| * | mistral: some more M10K fixes | Lofty | 2022-03-09 | 1 | -2/+2 |
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| * | mistral: preliminary bitstream info | Lofty | 2022-03-09 | 1 | -0/+41 |
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| * | refactor: New member functions to replace design_utils | gatecat | 2022-02-18 | 1 | -5/+4 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | run clangformat | gatecat | 2022-02-03 | 1 | -7/+9 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | Mistral: Use log_error, remove leftover debugging printf. | Olivier Galibert | 2022-01-19 | 1 | -1/+0 |
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| * | Mistral: fix gpio OE, add hmc bypass support | Olivier Galibert | 2022-01-18 | 1 | -24/+38 |
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| * | Sync with the current state of mistral | Olivier Galibert | 2022-01-18 | 1 | -99/+4 |
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| * | mistral: Update to latest enum name | gatecat | 2021-12-22 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: Adding support for MLABs as memory | gatecat | 2021-10-05 | 1 | -4/+46 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | clangformat | gatecat | 2021-08-26 | 1 | -3/+3 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: Use MLABs as if they're LABs (for now) | Lofty | 2021-08-17 | 1 | -24/+26 |
| | | | | | Signed-off-by: Lofty <dan.ravensloft@gmail.com> | ||||
| * | Use hashlib for core netlist structures | gatecat | 2021-06-02 | 1 | -5/+5 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: Make RBF compression optional | gatecat | 2021-05-30 | 1 | -1/+6 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: Add MISTRAL_CLKBUF cell type | gatecat | 2021-05-15 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: Fix ENA and ACLR bitstream generation | gatecat | 2021-05-15 | 1 | -2/+2 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: Fix EF_SEL and BTO_DIS | gatecat | 2021-05-15 | 1 | -3/+3 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: PKREG bits appear to be mirrored within a half? | gatecat | 2021-05-15 | 1 | -2/+3 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: FF&CLKBUF fixes, part 1 | gatecat | 2021-05-15 | 1 | -1/+9 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: First pass at FF and CLKBUF bitgen | gatecat | 2021-05-15 | 1 | -10/+102 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: Carry fixes | gatecat | 2021-05-15 | 1 | -1/+2 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: Carry debugging | gatecat | 2021-05-15 | 1 | -1/+4 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: Write arith mode to bitstream (not yet functional) | gatecat | 2021-05-15 | 1 | -0/+3 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: Write LUT inits | gatecat | 2021-05-15 | 1 | -0/+37 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: Add some IO configuration | gatecat | 2021-05-15 | 1 | -0/+30 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: Setting some more boilerplate bits | gatecat | 2021-05-15 | 1 | -0/+102 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: Add stub RBF generation | gatecat | 2021-05-15 | 1 | -0/+84 |
| Signed-off-by: gatecat <gatecat@ds0.me> | |||||
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index : iCE40/nextpnr | |
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