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* Reimplement FPGAWidget in modern OpenGL.Sergiusz Bazanski2018-06-221-0/+4
* Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnrClifford Wolf2018-06-201-3/+11
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| * WIP: adding timing budget to placerDavid Shah2018-06-201-2/+10
| * Improving timing annotatorDavid Shah2018-06-201-1/+1
* | Improve --tmfuzz mode and iCE40 delay estimatorClifford Wolf2018-06-201-7/+12
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* Add "nextpnr-ice40 --tmfuzz"Clifford Wolf2018-06-201-0/+40
* Fix jsonparse compiler warnings, clangformat updatesClifford Wolf2018-06-201-1/+1
* Working on the timing annotatorDavid Shah2018-06-201-1/+2
* Add Context::force and "nextpnr-ice40 --force"Clifford Wolf2018-06-191-3/+12
* Add rng to Context, start using ctx->verboseClifford Wolf2018-06-191-14/+10
* Getting rid of old IdString API users, Add ctx to many internal APIsClifford Wolf2018-06-181-1/+1
* Rename Design to Context, derive from Arch instead of instantiatingClifford Wolf2018-06-181-15/+14
* Rename Chip to Arch and ChipArgs to ArchArgsClifford Wolf2018-06-181-16/+16
* place_sa: Adding seed optionDavid Shah2018-06-171-1/+11
* General reformattingDavid Shah2018-06-171-1/+1
* Improving the placer outputDavid Shah2018-06-171-0/+2
* ice40: Fixing buildDavid Shah2018-06-171-1/+1
* place: Tidying up the SA placerDavid Shah2018-06-161-1/+1
* experiment: Simple heuristic-based placerDavid Shah2018-06-161-1/+1
* Add route-ripup routing loopClifford Wolf2018-06-141-1/+1
* Add A*-like optimizations to routerClifford Wolf2018-06-131-1/+7
* ice40: Add a PCF parserDavid Shah2018-06-131-0/+9
* ice40: Add package selectionDavid Shah2018-06-131-3/+14
* Simple IO buffer insertion, enable packer by defaultDavid Shah2018-06-131-4/+1
* Write tests to replace -test option from mainMiodrag Milanovic2018-06-121-61/+0
* reveresed logic for enabling main file, and made tests link arch filesMiodrag Milanovic2018-06-121-1/+1
* ice40: Debugging the packerDavid Shah2018-06-121-2/+12
* Add "nextpnr.h"Clifford Wolf2018-06-111-1/+1
* Fixed portability issue, now it works on msys2 windows build as wellMiodrag Milanovic2018-06-111-2/+3
* Pass design to gui, display chip nameMiodrag Milanovic2018-06-101-1/+1
* ice40: Write logic cell config to bitstreamDavid Shah2018-06-101-1/+1
* ice40: Writing an empty ASC fileDavid Shah2018-06-101-0/+9
* Add very basic routerClifford Wolf2018-06-091-0/+2
* python: Fixing builds as importable moduleDavid Shah2018-06-081-0/+5
* Reformat remaining filesDavid Shah2018-06-081-1/+0
* Applied clang-format to my own contributionsZipCPU2018-06-071-4/+3
* Set the default log to stdoutZipCPU2018-06-071-1/+5
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| * Moved placer definitions to place.h, main automatically runs placer nowZipCPU2018-06-071-3/+2
| * Preliminary placer changes to mainZipCPU2018-06-071-0/+7
* | ice40: More Python bindings and examplesDavid Shah2018-06-071-0/+1
* | ice40: Refactor PortPin and add Python bindingDavid Shah2018-06-071-1/+1
* | Connected the log file facility to stderrZipCPU2018-06-071-0/+3
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* Reformat Python bindings and ice40 mainDavid Shah2018-06-071-221/+226
* Fixing file->run renamingDavid Shah2018-06-071-1/+1
* Merge branch 'python'David Shah2018-06-071-1/+2
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| * Global design object workingDavid Shah2018-06-071-1/+1
| * Working on global Python design objectDavid Shah2018-06-071-0/+1
* | Add ICE40_HX1K_ONLY config macroClifford Wolf2018-06-071-8/+36
* | Rename --file to --runClifford Wolf2018-06-071-3/+3
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* Allow specifying multiple Python files on the command lineDavid Shah2018-06-071-3/+4
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