Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Add README about initial state of FPGA interchange implementation. | Keith Rothman | 2021-02-04 | 1 | -0/+170 |
* | Update FPGA interchange to use IdStringList. | Keith Rothman | 2021-02-04 | 2 | -132/+137 |
* | Start adding data for placement constraint solving. | Keith Rothman | 2021-02-04 | 2 | -50/+43 |
* | Debug BEL bucket data. | Keith Rothman | 2021-02-04 | 1 | -11/+14 |
* | Add initial updates to FPGA interchange arch for BEL buckets. | Keith Rothman | 2021-02-04 | 5 | -0/+247 |
* | Address review comments. | Keith Rothman | 2021-02-04 | 3 | -95/+6 |
* | Fix BBA import bugs. | Keith Rothman | 2021-02-04 | 2 | -69/+201 |
* | Assorted fixes to new FPGA interchange based arch. | Keith Rothman | 2021-02-04 | 3 | -5/+13 |
* | Initial compiling version. | Keith Rothman | 2021-02-04 | 2 | -16/+25 |
* | Initial FPGA interchange (which is just a cut-down xilinx arch). | Keith Rothman | 2021-02-04 | 9 | -0/+2102 |