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Commit message (
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Author
Age
Files
Lines
*
refactor: New member functions to replace design_utils
gatecat
2022-02-18
1
-15
/
+13
*
refactor: Use constids instead of id("..")
gatecat
2022-02-16
1
-273
/
+222
*
ecp5: LUT permutation support
gatecat
2021-12-13
1
-3
/
+55
*
clangformat
gatecat
2021-08-14
1
-2
/
+3
*
ecp5: Enable OPENDRAIN on differential outputs
Greg Davill
2021-08-14
1
-1
/
+13
*
ecp5: Add DCSC support
gatecat
2021-07-06
1
-0
/
+5
*
Fixing old emails and names in copyrights
gatecat
2021-06-12
1
-1
/
+1
*
Using hashlib in arches
gatecat
2021-06-02
1
-2
/
+2
*
Use hashlib for core netlist structures
gatecat
2021-06-02
1
-2
/
+1
*
ecp5: Use new cluster API
gatecat
2021-05-06
1
-1
/
+1
*
Only set CIBOUT_BYP on MULTs that are not feeding an ALU.
Adam Greig
2021-04-29
1
-1
/
+1
*
Add ALU54B.REG_OPCODEOP1_1_CLK parameter support
Adam Greig
2021-04-29
1
-0
/
+2
*
ecp5: Use snake case for arch-specific functions
D. Shah
2021-02-03
1
-162
/
+162
*
ecp5: Implement IdStringList for all arch object names
D. Shah
2021-02-02
1
-10
/
+5
*
cleanup: Spelling fixes
D. Shah
2021-01-28
1
-1
/
+1
*
ecp5: Fix bottom clock tile renaming for tilegroups
D. Shah
2021-01-25
1
-0
/
+8
*
clangformat
David Shah
2020-12-30
1
-1
/
+2
*
ecp5: Improve pseudo-diff IO error handling
David Shah
2020-12-27
1
-2
/
+4
*
clangformat
David Shah
2020-11-14
1
-4
/
+4
*
ecp5: Fix handling of CLK/LSR wire attached settings
David Shah
2020-11-05
1
-2
/
+4
*
ecp5: Add support for setting PIO clamp
David Shah
2020-09-26
1
-0
/
+3
*
ecp5: Add SYSCONFIG settings to bitstream
David Shah
2020-07-12
1
-2
/
+31
*
clangformat
David Shah
2020-05-16
1
-1
/
+2
*
ecp5: Allow setting drive strength for LVCMOS33D IOs
Mike Walters
2020-05-12
1
-0
/
+19
*
ecp5: Fix CSDECODE bitgen
David Shah
2020-04-15
1
-0
/
+3
*
ecp5: Fix routing bitgen for non-SERDES 'VCIB' tiles
David Shah
2020-04-10
1
-3
/
+12
*
ecp5: Make hysteresis default-on for LVCMOS33 bidir as well as input
David Shah
2020-04-09
1
-9
/
+7
*
Handle OPENDRAIN attribute.
Gary Wong
2020-04-03
1
-0
/
+3
*
Enum/int compatibility for EHXPLLL parameters
Martin
2020-04-02
1
-2
/
+7
*
ecp5: Proper support for '12k' device
David Shah
2020-03-13
1
-4
/
+8
*
ecp5: Fix differential inputs
David Shah
2020-03-08
1
-1
/
+6
*
ecp5: Add SPICB0 IO support
David Shah
2020-01-20
1
-2
/
+2
*
ecp5: Add support for top pseudo diff outputs
David Shah
2020-01-15
1
-12
/
+35
*
ecp5: Add support for flipflops with preload
David Shah
2019-12-07
1
-0
/
+4
*
ecp5: Fix 25k DDRDLLA bitstream gen
David Shah
2019-11-29
1
-2
/
+3
*
ecp5: Fix dynamic DELAYF control
David Shah
2019-11-18
1
-0
/
+3
*
ecp5: Allow setting drive strength for 3V3 IOs
David Shah
2019-10-26
1
-0
/
+10
*
ecp5: Add support for IO registers
David Shah
2019-10-09
1
-0
/
+6
*
ecp5: Preparations for new IO bels
David Shah
2019-10-09
1
-0
/
+7
*
ecp5: Adding support for 36-bit wide PDP RAMs
David Shah
2019-10-01
1
-15
/
+22
*
ecp5: Add support for clock gating with DCCA
David Shah
2019-08-31
1
-1
/
+29
*
ecp5: Add full part name to bitstream header
David Shah
2019-08-27
1
-0
/
+2
*
ecp5: Add GSR/SGSR support
David Shah
2019-08-27
1
-1
/
+1
*
ecp5: Add --out-of-context for building hard macros
David Shah
2019-08-07
1
-6
/
+4
*
ecp5: New Property interface
David Shah
2019-08-05
1
-56
/
+75
*
ecp5: Improve error message for bad chars in BRAM init strings
David Shah
2019-06-08
1
-7
/
+12
*
ecp5: Derived constraint support for PLLs, clock dividers and oscillators
David Shah
2019-02-24
1
-3
/
+4
*
ecp5: Fixes for litedram
David Shah
2019-02-24
1
-8
/
+12
*
ecp5: Add DIFFRESISTOR support
David Shah
2019-02-24
1
-0
/
+2
*
ecp5: Add support for referenced inputs
David Shah
2019-02-24
1
-5
/
+58
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