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| * Merge branch 'simann'David Shah2018-06-1611-76/+439
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| | * ice40: Fix RAM config in packerDavid Shah2018-06-161-1/+2
| | * ice40: Fix BRAM initialisationDavid Shah2018-06-162-4/+4
| | * place: Tidying up the SA placerDavid Shah2018-06-163-109/+37
| | * ice40: Include RAM init data in bitstreamDavid Shah2018-06-161-0/+40
| | * ice40: Fix bitstream generation when parameters are unspecifiedDavid Shah2018-06-161-13/+23
| | * place: Reformat placerDavid Shah2018-06-161-49/+46
| | * ice40: Bitstream generation for RAMDavid Shah2018-06-161-1/+36
| | * ice40: Only place IO at valid pinsDavid Shah2018-06-163-3/+14
| | * Improve placement heuristicDavid Shah2018-06-161-2/+1
| | * Fix router for routing to the same dest wire twiceClifford Wolf2018-06-161-21/+16
| | * Remove dead codeDavid Shah2018-06-161-8/+0
| | * Improving SA placer performanceDavid Shah2018-06-161-21/+50
| | * Very slow SA placer based on arachne-pnrDavid Shah2018-06-161-60/+241
| | * Create all without ui file, enables more controlMiodrag Milanovic2018-06-164-173/+93
| | * Propagate signalsMiodrag Milanovic2018-06-164-2/+13
| | * Experimenting with more unplacingDavid Shah2018-06-161-6/+11
| | * Adding randomness and changes metrics to placerDavid Shah2018-06-161-9/+25
| | * Updating placerDavid Shah2018-06-161-7/+35
| | * Update basic placer to use new APIDavid Shah2018-06-161-4/+10
| | * Another heuristic experimentDavid Shah2018-06-161-77/+18
| | * Playing about with placement heuristicsDavid Shah2018-06-161-5/+19
| | * experiment: Simple heuristic-based placerDavid Shah2018-06-167-9/+139
* | | Some refactoring of Chip API (prep for chipdb refactoring)Clifford Wolf2018-06-167-60/+93
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* | Fix router for routing to the same dest wire twiceClifford Wolf2018-06-151-21/+16
* | Create all without ui file, enables more controlMiodrag Milanovic2018-06-154-173/+93
* | Propagate signalsMiodrag Milanovic2018-06-154-2/+13
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* ice40: Another arch_place fixDavid Shah2018-06-141-1/+1
* ice40: General fixesDavid Shah2018-06-142-11/+21
* ice40: Read cells in arachne placement scriptDavid Shah2018-06-141-1/+1
* ice40: Importer for placed ice40 designs from arachneDavid Shah2018-06-143-0/+35
* Added back some size limits for UIMiodrag Milanovic2018-06-143-4/+9
* Split design widget on sideMiodrag Milanovic2018-06-146-258/+289
* separate clearPropertiesMiodrag Milanovic2018-06-142-4/+12
* CleanupMiodrag Milanovic2018-06-145-7/+6
* Split to classesMiodrag Milanovic2018-06-147-136/+169
* Split per widgetsMiodrag Milanovic2018-06-142-360/+414
* Add output of estimated total wire delay to router (as metric for placement q...Clifford Wolf2018-06-141-0/+49
* Increase ripup penalties over timeClifford Wolf2018-06-141-2/+8
* Add route-ripup routing loopClifford Wolf2018-06-143-38/+188
* Refactor position/delay estimation APIClifford Wolf2018-06-146-87/+37
* python: Clear SIGINT handler after Python loadsDavid Shah2018-06-141-0/+2
* Drastically reduce number of linker symbols in chipdbClifford Wolf2018-06-131-18/+40
* Cleanup and preps for further ui workMiodrag Milanovic2018-06-133-62/+48
* Make custom types for elements in tree viewMiodrag Milanovic2018-06-132-177/+145
* Improve router error reportingClifford Wolf2018-06-131-4/+15
* ice40: Rename ICESTORM_RAM pinsDavid Shah2018-06-132-3/+56
* Improve router error messagesClifford Wolf2018-06-131-5/+13
* Add support for CellInfo->pins in routerClifford Wolf2018-06-132-5/+17
* Add picorv32_top module with fewer IO pinsClifford Wolf2018-06-132-1/+32
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