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interchange: add constraints constraints application routine
Alessandro Comodi
2021-07-12
4
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+114
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Merge pull request #760 from YosysHQ/gatecat/xcup-ibufds
gatecat
2021-07-12
2
-5
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+16
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interchange: Skip IO ports in dedicated routing check
gatecat
2021-07-12
1
-0
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+8
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interchange: Debug IO port validity check failures
gatecat
2021-07-12
2
-3
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+5
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interchange: Place DIFFINBUF and IBUFCTRL for UltraScale+ IBUFDS
gatecat
2021-07-12
1
-3
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+4
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Merge pull request #759 from pepijndevos/gw1ndb
gatecat
2021-07-11
1
-1
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+8
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GW1NR is not a seperate family, but GW1NS is
Pepijn de Vos
2021-07-11
1
-1
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+8
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Merge pull request #758 from YosysHQ/gatecat/hist-oob
gatecat
2021-07-11
1
-1
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+6
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timing: Fix out-of-bounds histogram bins in all cases
gatecat
2021-07-10
1
-1
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+6
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Merge branch 'master' of github.com:YosysHQ/nextpnr
gatecat
2021-07-10
6
-23
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+93
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Merge pull request #755 from yrabbit/io_port
gatecat
2021-07-08
1
-16
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+24
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Fix the boolean.
YRabbit
2021-07-08
1
-1
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Fix formating
YRabbit
2021-07-07
1
-24
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+24
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Fix boolean value.
YRabbit
2021-07-07
1
-1
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Merge branch 'master' into io_port
YRabbit
2021-07-07
18
-78
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+201
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Wip parser
YRabbit
2021-07-07
1
-16
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+4
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Parser
YRabbit
2021-07-05
1
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+9
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Merge branch 'master' into io_port
YRabbit
2021-07-03
1
-2
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+13
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Fix parser. Comments and IO_PORT
YRabbit
2021-07-03
1
-11
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+9
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Syntax
YRabbit
2021-07-02
1
-3
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+3
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Add IO_PORT parsing
YRabbit
2021-07-02
1
-14
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+27
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Merge pull request #756 from acomodi/fix-clustering-runtime
gatecat
2021-07-08
5
-7
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+69
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interchange: bump python-interchange version
Alessandro Comodi
2021-07-08
1
-1
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+1
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interchange: update chipdb version
Alessandro Comodi
2021-07-08
1
-1
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+1
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interchange: reduce run-time to check dedicated interconnect
Alessandro Comodi
2021-07-08
4
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+67
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ice40: Fix order of values in error
gatecat
2021-07-10
1
-1
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+1
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clangformat
gatecat
2021-07-08
1
-2
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Merge pull request #751 from trabucayre/gw1ns-2
gatecat
2021-07-06
3
-7
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+8
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.cirrus/Dockerfile.ubuntu20.04: update apycula to 0.0.1a9
Gwenhael Goavec-Merou
2021-07-06
1
-1
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+1
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add support for GW1NS-2 family
Gwenhael Goavec-Merou
2021-07-06
2
-6
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+7
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Merge pull request #754 from YosysHQ/gatecat/ecp5-dcs
gatecat
2021-07-06
4
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+55
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ecp5: Add DCSC support
gatecat
2021-07-06
4
-11
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+55
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Merge pull request #752 from YosysHQ/gatecat/du-mem-error
gatecat
2021-07-06
1
-1
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+2
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design_utils: Fix memory error
gatecat
2021-07-06
1
-1
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+2
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Merge pull request #750 from YosysHQ/gatecat/io-improve
gatecat
2021-07-06
10
-59
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+136
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interchange: Allow pseudo pip wires to overlap with bound site wires on the s...
gatecat
2021-07-06
3
-17
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+13
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router2: Dump pre-bound routes when routing fails in debug mode
gatecat
2021-07-06
1
-1
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+11
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interchange: Improve search for PAD-attached bels
gatecat
2021-07-06
2
-41
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+32
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interchange: tests: add obuftds test
Alessandro Comodi
2021-07-06
6
-0
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+80
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Merge pull request #748 from acomodi/fix-phys-net-writing
gatecat
2021-07-02
1
-2
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+13
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interchange: phys: skip only nets writing on disconnected out ports
Alessandro Comodi
2021-07-02
1
-2
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+13
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Merge pull request #747 from cr1901/machxo2
gatecat
2021-07-01
9
-13
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+140
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machxo2: Fix packing for directly-connected DFFs.
William D. Jones
2021-07-01
3
-9
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+28
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machxo2: Add VHDL primitives, demo, and script.
William D. Jones
2021-07-01
4
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+81
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machxo2: Add a special case for pips whose config bits are in multiple
William D. Jones
2021-07-01
1
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+12
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machxo2: Hardcode a rule for emitting U_/D_ or G_ prefixes in ASCII output.
William D. Jones
2021-07-01
1
-2
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+17
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machxo2: Set Pip and Wire delays to reasonable fake values mirroring
William D. Jones
2021-07-01
1
-2
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+2
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Merge pull request #746 from YosysHQ/gatecat/ic-can-invert-const
gatecat
2021-07-01
1
-5
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+9
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interchange: Handle canInvert PIPs when processing preferred constants
gatecat
2021-07-01
1
-5
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+9
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Merge pull request #745 from YosysHQ/gatecat/ic-node-source
gatecat
2021-07-01
1
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+5
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