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| author | gatecat <gatecat@ds0.me> | 2021-07-10 23:23:19 +0100 |
|---|---|---|
| committer | gatecat <gatecat@ds0.me> | 2021-07-10 23:23:19 +0100 |
| commit | d290766101a62d575c3e6aacbecde46ecab349f6 (patch) | |
| tree | 1bb58b884e9ef768ae416cc08bc8536ea772d8f8 | |
| parent | 6829e4c197758a4bd68449e4843a6b3992ca3723 (diff) | |
| download | nextpnr-d290766101a62d575c3e6aacbecde46ecab349f6.tar.gz nextpnr-d290766101a62d575c3e6aacbecde46ecab349f6.tar.bz2 nextpnr-d290766101a62d575c3e6aacbecde46ecab349f6.zip | |
ice40: Fix order of values in error
Signed-off-by: gatecat <gatecat@ds0.me>
| -rw-r--r-- | ice40/pack.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/ice40/pack.cc b/ice40/pack.cc index b9857fbd..67c3dbb7 100644 --- a/ice40/pack.cc +++ b/ice40/pack.cc @@ -1090,7 +1090,7 @@ void set_period(Context *ctx, CellInfo *ci, IdString port, delay_t period) if (!equals_epsilon(to->clkconstr->period.maxDelay(), period)) log_warning(" Overriding derived constraint of %.1f MHz on net %s with user-specified constraint of " "%.1f MHz.\n", - MHz(ctx, to->clkconstr->period.maxDelay()), to->name.c_str(ctx), MHz(ctx, period)); + MHz(ctx, period), to->name.c_str(ctx), MHz(ctx, to->clkconstr->period.maxDelay())); return; } to->clkconstr = std::unique_ptr<ClockConstraint>(new ClockConstraint()); |