1 files changed, 165 insertions, 1 deletions
diff --git a/ice40/constids.inc b/ice40/constids.inc
index 6aa5c4c0..8bad9e25 100644
--- a/ice40/constids.inc
+++ b/ice40/constids.inc
@@ -448,4 +448,168 @@ X(SB_RGB_DRV)
 X(DFF_ENABLE)
 X(CARRY_ENABLE)
 X(NEG_CLK)
-X(IO_STANDARD)
-\ No newline at end of file
+X(IO_STANDARD)
+X(A)
+X(ASYNC_SR)
+X(A_REG)
+X(A_SIGNED)
+X(BEL)
+X(BEL_PAD_INPUT)
+X(BOTADDSUB_CARRYSELECT)
+X(BOTADDSUB_LOWERINPUT)
+X(BOTADDSUB_UPPERINPUT)
+X(BOTOUTPUT_SELECT)
+X(BOT_8x8_MULT_REG)
+X(BUS_ADDR74)
+X(B_REG)
+X(B_SIGNED)
+X(C)
+X(CARRY_IN_MUX)
+X(CIN_CONST)
+X(CIN_SET)
+X(CLKHF_DIV)
+X(CURRENT_MODE)
+X(C_REG)
+X(D)
+X(DELAY_ADJMODE_FB)
+X(DELAY_ADJMODE_REL)
+X(DELAY_ADJUSTMENT_MODE_FEEDBACK)
+X(DELAY_ADJUSTMENT_MODE_RELATIVE)
+X(DIVF)
+X(DIVQ)
+X(DIVR)
+X(D_REG)
+X(E)
+X(FDA_FEEDBACK)
+X(FDA_RELATIVE)
+X(FEEDBACK_PATH)
+X(FILTER_RANGE)
+X(FOR_PAD_IN)
+X(GLB2LOCAL)
+X(GLB_NETWK)
+X(GLOBAL)
+X(GND)
+X(GRID_X)
+X(GRID_Y)
+X(GRID_Z)
+X(I)
+X(I2C_SLAVE_INIT_ADDR)
+X(INDEX)
+X(LEDDRST)
+X(LOCAL)
+X(LUTFF_COUT)
+X(LUTFF_GLOBAL)
+X(LUTFF_IN)
+X(LUTFF_IN_LUT)
+X(LUTFF_LOUT)
+X(LUTFF_OUT)
+X(LUT_INIT)
+X(MODE_8x8)
+X(NEG_CLK_R)
+X(NEG_CLK_W)
+X(NEG_TRIGGER)
+X(PACKAGEPIN)
+X(PIN_TYPE)
+X(PIPELINE_16x16_MULT_REG1)
+X(PIPELINE_16x16_MULT_REG2)
+X(PLLOUTCORE)
+X(PLLOUTCOREA)
+X(PLLOUTCOREB)
+X(PLLOUTGLOBAL)
+X(PLLOUTGLOBALA)
+X(PLLOUTGLOBALB)
+X(PLLOUT_SELECT)
+X(PLLOUT_SELECT_A)
+X(PLLOUT_SELECT_B)
+X(PLLOUT_SELECT_PORTA)
+X(PLLOUT_SELECT_PORTB)
+X(PLLTYPE)
+X(PULLUP)
+X(PULLUP_RESISTOR)
+X(Q)
+X(R)
+X(RCLKN)
+X(READ_MODE)
+X(RGB0_CURRENT)
+X(RGB1_CURRENT)
+X(RGB2_CURRENT)
+X(ROUTE_THROUGH_FABRIC)
+X(S)
+X(SB_CARRY)
+X(SB_DFF)
+X(SB_DFFE)
+X(SB_DFFER)
+X(SB_DFFES)
+X(SB_DFFESR)
+X(SB_DFFESS)
+X(SB_DFFN)
+X(SB_DFFNE)
+X(SB_DFFNER)
+X(SB_DFFNES)
+X(SB_DFFNESR)
+X(SB_DFFNESS)
+X(SB_DFFNR)
+X(SB_DFFNS)
+X(SB_DFFNSR)
+X(SB_DFFNSS)
+X(SB_DFFR)
+X(SB_DFFS)
+X(SB_DFFSR)
+X(SB_DFFSS)
+X(SB_GB_IO)
+X(SB_HFOSC)
+X(SB_LFOSC)
+X(SB_LUT4)
+X(SB_MAC16)
+X(SB_PLL40_2F_CORE)
+X(SB_PLL40_2F_PAD)
+X(SB_PLL40_2_PAD)
+X(SB_PLL40_CORE)
+X(SB_PLL40_PAD)
+X(SB_RAM40_4K)
+X(SB_RAM40_4KNR)
+X(SB_RAM40_4KNRNW)
+X(SB_RAM40_4KNW)
+X(SB_SPRAM256KA)
+X(SDA_INPUT_DELAYED)
+X(SDA_OUTPUT_DELAYED)
+X(SET_NORESET)
+X(SHIFTREG_DIVMODE)
+X(SHIFTREG_DIV_MODE)
+X(SP12_H)
+X(SP12_V)
+X(SP4_H)
+X(SP4_V)
+X(TEST_MODE)
+X(TOPADDSUB_CARRYSELECT)
+X(TOPADDSUB_LOWERINPUT)
+X(TOPADDSUB_UPPERINPUT)
+X(TOPOUTPUT_SELECT)
+X(TOP_8x8_MULT_REG)
+X(TRIM_EN)
+X(TYPE)
+X(VCC)
+X(WCLKN)
+X(WRITE_MODE)
+X(Y)
+X(hx1k)
+X(hx4k)
+X(hx8k)
+X(lp1k)
+X(lp384)
+X(lp4k)
+X(lp8k)
+X(no_promote_globals)
+X(opt_timing)
+X(pack)
+X(pcf_allow_unconstrained)
+X(place)
+X(placer)
+X(promote_logic)
+X(route)
+X(router)
+X(u1k)
+X(u2k)
+X(u4k)
+X(up3k)
+X(up5k)