diff options
Diffstat (limited to 'ecp5')
-rw-r--r-- | ecp5/arch.cc | 8 | ||||
-rw-r--r-- | ecp5/arch.h | 6 |
2 files changed, 6 insertions, 8 deletions
diff --git a/ecp5/arch.cc b/ecp5/arch.cc index d2d62241..9dac70d9 100644 --- a/ecp5/arch.cc +++ b/ecp5/arch.cc @@ -375,7 +375,6 @@ BelId Arch::getPioByFunctionName(const std::string &name) const } std::vector<PortPin> Arch::getBelPins(BelId bel) const - { std::vector<PortPin> ret; NPNR_ASSERT(bel != BelId()); @@ -496,9 +495,10 @@ bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort return false; } -IdString Arch::getPortClock(const CellInfo *cell, IdString port) const { return IdString(); } - -bool Arch::isClockPort(const CellInfo *cell, IdString port) const { return false; } +TimingPortClass Arch::getPortTimingClass(const CellInfo *cell, IdString port, IdString &clockPort) const +{ + return TMG_IGNORE; +} std::vector<std::pair<std::string, std::string>> Arch::getTilesAtLocation(int row, int col) { diff --git a/ecp5/arch.h b/ecp5/arch.h index 55c1caa1..8a212ed0 100644 --- a/ecp5/arch.h +++ b/ecp5/arch.h @@ -828,10 +828,8 @@ struct Arch : BaseCtx // Get the delay through a cell from one port to another, returning false // if no path exists bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayInfo &delay) const; - // Get the associated clock to a port, or empty if the port is combinational - IdString getPortClock(const CellInfo *cell, IdString port) const; - // Return true if a port is a clock - bool isClockPort(const CellInfo *cell, IdString port) const; + // Get the port class, also setting clockPort if applicable + TimingPortClass getPortTimingClass(const CellInfo *cell, IdString port, IdString &clockPort) const; // Return true if a port is a net bool isGlobalNet(const NetInfo *net) const; |