diff options
| -rw-r--r-- | common/parallel_refine.cc | 7 | ||||
| -rw-r--r-- | fpga_interchange/arch.h | 2 | ||||
| -rw-r--r-- | fpga_interchange/site_lut_mapping_cache.h | 6 | ||||
| -rw-r--r-- | nexus/pack.cc | 3 |
4 files changed, 8 insertions, 10 deletions
diff --git a/common/parallel_refine.cc b/common/parallel_refine.cc index c2905480..bc665cd3 100644 --- a/common/parallel_refine.cc +++ b/common/parallel_refine.cc @@ -23,8 +23,8 @@ #if !defined(__wasm) #include "fast_bels.h" -#include "timing.h" #include "scope_lock.h" +#include "timing.h" #include <chrono> #include <mutex> @@ -952,10 +952,7 @@ NEXTPNR_NAMESPACE_END NEXTPNR_NAMESPACE_BEGIN -bool parallel_refine(Context *ctx, ParallelRefineCfg cfg) -{ - log_abort(); -} +bool parallel_refine(Context *ctx, ParallelRefineCfg cfg) { log_abort(); } NEXTPNR_NAMESPACE_END diff --git a/fpga_interchange/arch.h b/fpga_interchange/arch.h index 78877452..789b188e 100644 --- a/fpga_interchange/arch.h +++ b/fpga_interchange/arch.h @@ -1134,7 +1134,7 @@ struct Arch : ArchAPI<ArchRanges> IdString vcc_cell_pin; std::vector<std::vector<LutElement>> lut_elements; dict<IdString, const LutCellPOD *> lut_cells; - + // Defines the max number of LUT cells in a site and LUT pins // to allow a correct functioning of the site lut mapping cache int max_lut_cells; diff --git a/fpga_interchange/site_lut_mapping_cache.h b/fpga_interchange/site_lut_mapping_cache.h index 3efd040f..31e7e5e1 100644 --- a/fpga_interchange/site_lut_mapping_cache.h +++ b/fpga_interchange/site_lut_mapping_cache.h @@ -51,9 +51,9 @@ struct SiteLutMappingKey } }; - int32_t tileType; // Tile type - int32_t siteType; // Site type in that tile type - size_t numCells; // LUT cell count + int32_t tileType; // Tile type + int32_t siteType; // Site type in that tile type + size_t numCells; // LUT cell count std::vector<Cell> cells; // LUT cell data unsigned int hash_; // Precomputed hash diff --git a/nexus/pack.cc b/nexus/pack.cc index bff50d89..66d897a8 100644 --- a/nexus/pack.cc +++ b/nexus/pack.cc @@ -883,7 +883,8 @@ struct NexusPacker for (size_t i = 0; i < std::min<size_t>(clk_fanout.size(), available_globals); i++) { NetInfo *net = ctx->nets.at(clk_fanout.at(i).second).get(); log_info(" promoting clock net '%s'\n", ctx->nameOf(net)); - insert_buffer(net, id_DCC, "glb_clk", id_CLKI, id_CLKO, [&](const PortRef &port) { return port.cell->type != id_DCC; }); + insert_buffer(net, id_DCC, "glb_clk", id_CLKI, id_CLKO, + [&](const PortRef &port) { return port.cell->type != id_DCC; }); } } |