diff options
| -rw-r--r-- | ice40/arch.cc | 7 | ||||
| -rw-r--r-- | ice40/arch.h | 38 | ||||
| -rw-r--r-- | ice40/bitstream.cc | 10 |
3 files changed, 11 insertions, 44 deletions
diff --git a/ice40/arch.cc b/ice40/arch.cc index 74353fe6..adc37dbd 100644 --- a/ice40/arch.cc +++ b/ice40/arch.cc @@ -241,7 +241,6 @@ IdString Arch::archArgsToId(ArchArgs args) const BelId Arch::getBelByName(IdString name) const { - boost::lock_guard<boost::shared_mutex> lock(mtx_); BelId ret; if (bel_by_name.empty()) { @@ -277,7 +276,6 @@ BelRange Arch::getBelsAtSameTile(BelId bel) const WireId Arch::getWireBelPin(BelId bel, PortPin pin) const { WireId ret; - boost::shared_lock_guard<boost::shared_mutex> lock(mtx_); NPNR_ASSERT(bel != BelId()); @@ -298,7 +296,6 @@ WireId Arch::getWireBelPin(BelId bel, PortPin pin) const WireId Arch::getWireByName(IdString name) const { WireId ret; - boost::shared_lock_guard<boost::shared_mutex> lock(mtx_); if (wire_by_name.empty()) { for (int i = 0; i < chip_info->num_wires; i++) @@ -317,7 +314,6 @@ WireId Arch::getWireByName(IdString name) const PipId Arch::getPipByName(IdString name) const { PipId ret; - boost::shared_lock_guard<boost::shared_mutex> lock(mtx_); if (pip_by_name.empty()) { for (int i = 0; i < chip_info->num_pips; i++) { @@ -376,8 +372,6 @@ std::string Arch::getBelPackagePin(BelId bel) const // ----------------------------------------------------------------------- -// TODO(cliffordvienna): lock all of this - GroupId Arch::getGroupByName(IdString name) const { for (auto g : getGroups()) @@ -503,7 +497,6 @@ DecalXY Arch::getGroupDecal(GroupId group) const std::vector<GraphicElement> Arch::getDecalGraphics(DecalId decal) const { - boost::shared_lock_guard<boost::shared_mutex> lock(mtx_); std::vector<GraphicElement> ret; if (decal.type == DecalId::TYPE_FRAME) { diff --git a/ice40/arch.h b/ice40/arch.h index a7af3269..e42da422 100644 --- a/ice40/arch.h +++ b/ice40/arch.h @@ -21,9 +21,6 @@ #error Include "arch.h" via "nextpnr.h" only. #endif -#include <boost/thread/shared_lock_guard.hpp> -#include <boost/thread/shared_mutex.hpp> - NEXTPNR_NAMESPACE_BEGIN /**** Everything in this section must be kept in sync with chipdb.py ****/ @@ -327,17 +324,8 @@ struct ArchArgs std::string package; }; -class Arch : public BaseCtx +struct Arch : BaseCtx { -private: - // All of the following... - std::vector<IdString> bel_to_cell; - std::vector<IdString> wire_to_net; - std::vector<IdString> pip_to_net; - std::vector<IdString> switches_locked; - // ... are guarded by the following lock: - mutable boost::shared_mutex mtx_; -public: const ChipInfoPOD *chip_info; const PackageInfoPOD *package_info; @@ -345,6 +333,11 @@ public: mutable std::unordered_map<IdString, int> wire_by_name; mutable std::unordered_map<IdString, int> pip_by_name; + std::vector<IdString> bel_to_cell; + std::vector<IdString> wire_to_net; + std::vector<IdString> pip_to_net; + std::vector<IdString> switches_locked; + ArchArgs args; Arch(ArchArgs args); @@ -375,7 +368,6 @@ public: { NPNR_ASSERT(bel != BelId()); NPNR_ASSERT(bel_to_cell[bel.index] == IdString()); - boost::lock_guard<boost::shared_mutex> lock(mtx_); bel_to_cell[bel.index] = cell; cells[cell]->bel = bel; cells[cell]->belStrength = strength; @@ -385,7 +377,6 @@ public: { NPNR_ASSERT(bel != BelId()); NPNR_ASSERT(bel_to_cell[bel.index] != IdString()); - boost::lock_guard<boost::shared_mutex> lock(mtx_); cells[bel_to_cell[bel.index]]->bel = BelId(); cells[bel_to_cell[bel.index]]->belStrength = STRENGTH_NONE; bel_to_cell[bel.index] = IdString(); @@ -394,21 +385,18 @@ public: bool checkBelAvail(BelId bel) const { NPNR_ASSERT(bel != BelId()); - boost::shared_lock_guard<boost::shared_mutex> lock(mtx_); return bel_to_cell[bel.index] == IdString(); } IdString getBoundBelCell(BelId bel) const { NPNR_ASSERT(bel != BelId()); - boost::shared_lock_guard<boost::shared_mutex> lock(mtx_); return bel_to_cell[bel.index]; } IdString getConflictingBelCell(BelId bel) const { NPNR_ASSERT(bel != BelId()); - boost::shared_lock_guard<boost::shared_mutex> lock(mtx_); return bel_to_cell[bel.index]; } @@ -482,8 +470,6 @@ public: { NPNR_ASSERT(wire != WireId()); NPNR_ASSERT(wire_to_net[wire.index] == IdString()); - boost::lock_guard<boost::shared_mutex> lock(mtx_); - wire_to_net[wire.index] = net; nets[net]->wires[wire].pip = PipId(); nets[net]->wires[wire].strength = strength; @@ -493,7 +479,6 @@ public: { NPNR_ASSERT(wire != WireId()); NPNR_ASSERT(wire_to_net[wire.index] != IdString()); - boost::lock_guard<boost::shared_mutex> lock(mtx_); auto &net_wires = nets[wire_to_net[wire.index]]->wires; auto it = net_wires.find(wire); @@ -512,24 +497,18 @@ public: bool checkWireAvail(WireId wire) const { NPNR_ASSERT(wire != WireId()); - boost::shared_lock_guard<boost::shared_mutex> lock(mtx_); - return wire_to_net[wire.index] == IdString(); } IdString getBoundWireNet(WireId wire) const { NPNR_ASSERT(wire != WireId()); - boost::shared_lock_guard<boost::shared_mutex> lock(mtx_); - return wire_to_net[wire.index]; } IdString getConflictingWireNet(WireId wire) const { NPNR_ASSERT(wire != WireId()); - boost::shared_lock_guard<boost::shared_mutex> lock(mtx_); - return wire_to_net[wire.index]; } @@ -553,7 +532,6 @@ public: NPNR_ASSERT(pip != PipId()); NPNR_ASSERT(pip_to_net[pip.index] == IdString()); NPNR_ASSERT(switches_locked[chip_info->pip_data[pip.index].switch_index] == IdString()); - boost::lock_guard<boost::shared_mutex> lock(mtx_); pip_to_net[pip.index] = net; switches_locked[chip_info->pip_data[pip.index].switch_index] = net; @@ -571,7 +549,6 @@ public: NPNR_ASSERT(pip != PipId()); NPNR_ASSERT(pip_to_net[pip.index] != IdString()); NPNR_ASSERT(switches_locked[chip_info->pip_data[pip.index].switch_index] != IdString()); - boost::lock_guard<boost::shared_mutex> lock(mtx_); WireId dst; dst.index = chip_info->pip_data[pip.index].dst; @@ -586,21 +563,18 @@ public: bool checkPipAvail(PipId pip) const { NPNR_ASSERT(pip != PipId()); - boost::shared_lock_guard<boost::shared_mutex> lock(mtx_); return switches_locked[chip_info->pip_data[pip.index].switch_index] == IdString(); } IdString getBoundPipNet(PipId pip) const { NPNR_ASSERT(pip != PipId()); - boost::shared_lock_guard<boost::shared_mutex> lock(mtx_); return pip_to_net[pip.index]; } IdString getConflictingPipNet(PipId pip) const { NPNR_ASSERT(pip != PipId()); - boost::shared_lock_guard<boost::shared_mutex> lock(mtx_); return switches_locked[chip_info->pip_data[pip.index].switch_index]; } diff --git a/ice40/bitstream.cc b/ice40/bitstream.cc index 58a59366..a62c6c09 100644 --- a/ice40/bitstream.cc +++ b/ice40/bitstream.cc @@ -128,7 +128,7 @@ void write_asc(const Context *ctx, std::ostream &out) } // Set pips for (auto pip : ctx->getPips()) { - if (ctx->getBoundPipNet(pip) != IdString()) { + if (ctx->pip_to_net[pip.index] != IdString()) { const PipInfoPOD &pi = ci.pip_data[pip.index]; const SwitchInfoPOD &swi = bi.switches[pi.switch_index]; for (int i = 0; i < swi.num_bits; i++) { @@ -199,8 +199,8 @@ void write_asc(const Context *ctx, std::ostream &out) NPNR_ASSERT(iez != -1); bool input_en = false; - if (!ctx->checkWireAvail(ctx->getWireBelPin(bel, PIN_D_IN_0)) || - !ctx->checkWireAvail(ctx->getWireBelPin(bel, PIN_D_IN_1))) { + if ((ctx->wire_to_net[ctx->getWireBelPin(bel, PIN_D_IN_0).index] != IdString()) || + (ctx->wire_to_net[ctx->getWireBelPin(bel, PIN_D_IN_1).index] != IdString())) { input_en = true; } @@ -271,7 +271,7 @@ void write_asc(const Context *ctx, std::ostream &out) } // Set config bits in unused IO and RAM for (auto bel : ctx->getBels()) { - if (ctx->checkBelAvail(bel) && ctx->getBelType(bel) == TYPE_SB_IO) { + if (ctx->bel_to_cell[bel.index] == IdString() && ctx->getBelType(bel) == TYPE_SB_IO) { const TileInfoPOD &ti = bi.tiles_nonrouting[TILE_IO]; const BelInfoPOD &beli = ci.bel_data[bel.index]; int x = beli.x, y = beli.y, z = beli.z; @@ -284,7 +284,7 @@ void write_asc(const Context *ctx, std::ostream &out) set_config(ti, config.at(iey).at(iex), "IoCtrl.REN_" + std::to_string(iez), false); } } - } else if (ctx->checkBelAvail(bel) && ctx->getBelType(bel) == TYPE_ICESTORM_RAM) { + } else if (ctx->bel_to_cell[bel.index] == IdString() && ctx->getBelType(bel) == TYPE_ICESTORM_RAM) { const BelInfoPOD &beli = ci.bel_data[bel.index]; int x = beli.x, y = beli.y; const TileInfoPOD &ti = bi.tiles_nonrouting[TILE_RAMB]; |