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-rw-r--r--common/nextpnr.h60
-rw-r--r--generic/arch.cc31
-rw-r--r--generic/arch.h28
-rw-r--r--generic/archdefs.h1
-rw-r--r--gui/fpgaviewwidget.cc30
-rw-r--r--ice40/arch.cc181
-rw-r--r--ice40/arch.h10
-rw-r--r--ice40/archdefs.h22
-rw-r--r--ice40/gfx.cc420
-rw-r--r--ice40/gfx.h473
10 files changed, 1155 insertions, 101 deletions
diff --git a/common/nextpnr.h b/common/nextpnr.h
index 37e193b9..0b41ff81 100644
--- a/common/nextpnr.h
+++ b/common/nextpnr.h
@@ -155,6 +155,12 @@ NEXTPNR_NAMESPACE_END
NEXTPNR_NAMESPACE_BEGIN
+struct DecalXY
+{
+ DecalId decal;
+ float x = 0, y = 0;
+};
+
struct BelPin
{
BelId bel;
@@ -273,6 +279,60 @@ struct Context : Arch
// --------------------------------------------------------------
+ std::vector<GraphicElement> getFrameGraphics() const __attribute__ ((deprecated)) {
+ std::vector<GraphicElement> ret;
+ DecalXY decalxy = getFrameDecal();
+ ret = getDecalGraphics(decalxy.decal);
+ for (auto &it : ret) {
+ it.x1 += decalxy.x;
+ it.x2 += decalxy.x;
+ it.y1 += decalxy.y;
+ it.y2 += decalxy.y;
+ }
+ return ret;
+ }
+
+ std::vector<GraphicElement> getBelGraphics(BelId bel) const __attribute__ ((deprecated)) {
+ std::vector<GraphicElement> ret;
+ DecalXY decalxy = getBelDecal(bel);
+ ret = getDecalGraphics(decalxy.decal);
+ for (auto &it : ret) {
+ it.x1 += decalxy.x;
+ it.x2 += decalxy.x;
+ it.y1 += decalxy.y;
+ it.y2 += decalxy.y;
+ }
+ return ret;
+ }
+
+ std::vector<GraphicElement> getWireGraphics(WireId wire) const __attribute__ ((deprecated)) {
+ std::vector<GraphicElement> ret;
+ DecalXY decalxy = getWireDecal(wire);
+ ret = getDecalGraphics(decalxy.decal);
+ for (auto &it : ret) {
+ it.x1 += decalxy.x;
+ it.x2 += decalxy.x;
+ it.y1 += decalxy.y;
+ it.y2 += decalxy.y;
+ }
+ return ret;
+ }
+
+ std::vector<GraphicElement> getPipGraphics(PipId pip) const __attribute__ ((deprecated)) {
+ std::vector<GraphicElement> ret;
+ DecalXY decalxy = getPipDecal(pip);
+ ret = getDecalGraphics(decalxy.decal);
+ for (auto &it : ret) {
+ it.x1 += decalxy.x;
+ it.x2 += decalxy.x;
+ it.y1 += decalxy.y;
+ it.y2 += decalxy.y;
+ }
+ return ret;
+ }
+
+ // --------------------------------------------------------------
+
uint64_t rngstate = 0x3141592653589793;
uint64_t rng64()
diff --git a/generic/arch.cc b/generic/arch.cc
index 8f897604..b3854401 100644
--- a/generic/arch.cc
+++ b/generic/arch.cc
@@ -107,27 +107,32 @@ void Arch::addBelInout(IdString bel, IdString name, IdString wire)
wires.at(wire).downhill_bel_pins.push_back(BelPin{bel, name});
}
-void Arch::addFrameGraphic(const GraphicElement &graphic)
+void Arch::addDecalGraphic(DecalId decal, const GraphicElement &graphic)
{
- frame_graphics.push_back(graphic);
+ decal_graphics[decal].push_back(graphic);
+}
+
+void Arch::setFrameDecal(DecalXY decalxy)
+{
+ frame_decalxy = decalxy;
frameGraphicsReload = true;
}
-void Arch::addWireGraphic(WireId wire, const GraphicElement &graphic)
+void Arch::setWireDecal(WireId wire, DecalXY decalxy)
{
- wires.at(wire).graphics.push_back(graphic);
+ wires.at(wire).decalxy = decalxy;
wireGraphicsReload.insert(wire);
}
-void Arch::addPipGraphic(PipId pip, const GraphicElement &graphic)
+void Arch::setPipDecal(PipId pip, DecalXY decalxy)
{
- pips.at(pip).graphics.push_back(graphic);
+ pips.at(pip).decalxy = decalxy;
pipGraphicsReload.insert(pip);
}
-void Arch::addBelGraphic(BelId bel, const GraphicElement &graphic)
+void Arch::setBelDecal(BelId bel, DecalXY decalxy)
{
- bels.at(bel).graphics.push_back(graphic);
+ bels.at(bel).decalxy = decalxy;
belGraphicsReload.insert(bel);
}
@@ -310,13 +315,15 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const
// ---------------------------------------------------------------
-const std::vector<GraphicElement> &Arch::getFrameGraphics() const { return frame_graphics; }
+const std::vector<GraphicElement> &Arch::getDecalGraphics(DecalId decal) const { return decal_graphics.at(decal); }
+
+DecalXY Arch::getFrameDecal() const { return frame_decalxy; }
-const std::vector<GraphicElement> &Arch::getBelGraphics(BelId bel) const { return bels.at(bel).graphics; }
+DecalXY Arch::getBelDecal(BelId bel) const { return bels.at(bel).decalxy; }
-const std::vector<GraphicElement> &Arch::getWireGraphics(WireId wire) const { return wires.at(wire).graphics; }
+DecalXY Arch::getWireDecal(WireId wire) const { return wires.at(wire).decalxy; }
-const std::vector<GraphicElement> &Arch::getPipGraphics(PipId pip) const { return pips.at(pip).graphics; }
+DecalXY Arch::getPipDecal(PipId pip) const { return pips.at(pip).decalxy; }
// ---------------------------------------------------------------
diff --git a/generic/arch.h b/generic/arch.h
index e739cfab..dafbfec3 100644
--- a/generic/arch.h
+++ b/generic/arch.h
@@ -34,16 +34,16 @@ struct PipInfo
IdString name, bound_net;
WireId srcWire, dstWire;
DelayInfo delay;
- std::vector<GraphicElement> graphics;
+ DecalXY decalxy;
};
struct WireInfo
{
IdString name, bound_net;
- std::vector<GraphicElement> graphics;
std::vector<PipId> downhill, uphill, aliases;
BelPin uphill_bel_pin;
std::vector<BelPin> downhill_bel_pins;
+ DecalXY decalxy;
int grid_x, grid_y;
};
@@ -58,7 +58,7 @@ struct BelInfo
{
IdString name, type, bound_cell;
std::unordered_map<IdString, PinInfo> pins;
- std::vector<GraphicElement> graphics;
+ DecalXY decalxy;
int grid_x, grid_y;
bool gb;
};
@@ -74,7 +74,9 @@ struct Arch : BaseCtx
std::vector<IdString> bel_ids, wire_ids, pip_ids;
std::unordered_map<IdString, std::vector<IdString>> bel_ids_by_type;
- std::vector<GraphicElement> frame_graphics;
+ std::unordered_map<DecalId, std::vector<GraphicElement>> decal_graphics;
+ DecalXY frame_decalxy;
+
float grid_distance_to_delay;
void addWire(IdString name, int x, int y);
@@ -86,10 +88,11 @@ struct Arch : BaseCtx
void addBelOutput(IdString bel, IdString name, IdString wire);
void addBelInout(IdString bel, IdString name, IdString wire);
- void addFrameGraphic(const GraphicElement &graphic);
- void addWireGraphic(WireId wire, const GraphicElement &graphic);
- void addPipGraphic(PipId pip, const GraphicElement &graphic);
- void addBelGraphic(BelId bel, const GraphicElement &graphic);
+ void addDecalGraphic(DecalId decal, const GraphicElement &graphic);
+ void setFrameDecal(DecalXY decalxy);
+ void setWireDecal(WireId wire, DecalXY decalxy);
+ void setPipDecal(PipId pip, DecalXY decalxy);
+ void setBelDecal(BelId bel, DecalXY decalxy);
// ---------------------------------------------------------------
// Common Arch API. Every arch must provide the following methods.
@@ -155,10 +158,11 @@ struct Arch : BaseCtx
float getDelayNS(delay_t v) const { return v; }
uint32_t getDelayChecksum(delay_t v) const { return 0; }
- const std::vector<GraphicElement> &getFrameGraphics() const;
- const std::vector<GraphicElement> &getBelGraphics(BelId bel) const;
- const std::vector<GraphicElement> &getWireGraphics(WireId wire) const;
- const std::vector<GraphicElement> &getPipGraphics(PipId pip) const;
+ const std::vector<GraphicElement> &getDecalGraphics(DecalId decal) const;
+ DecalXY getFrameDecal() const;
+ DecalXY getBelDecal(BelId bel) const;
+ DecalXY getWireDecal(WireId wire) const;
+ DecalXY getPipDecal(PipId pip) const;
bool allGraphicsReload = false;
bool frameGraphicsReload = false;
diff --git a/generic/archdefs.h b/generic/archdefs.h
index 9e8462e0..8e6dcb2f 100644
--- a/generic/archdefs.h
+++ b/generic/archdefs.h
@@ -49,5 +49,6 @@ typedef IdString PortPin;
typedef IdString BelId;
typedef IdString WireId;
typedef IdString PipId;
+typedef IdString DecalId;
NEXTPNR_NAMESPACE_END
diff --git a/gui/fpgaviewwidget.cc b/gui/fpgaviewwidget.cc
index 2c69f865..0c70012f 100644
--- a/gui/fpgaviewwidget.cc
+++ b/gui/fpgaviewwidget.cc
@@ -297,8 +297,8 @@ void FPGAViewWidget::setZoom(float t_z)
if (zoom_ < 1.0f)
zoom_ = 1.0f;
- if (zoom_ > 100.f)
- zoom_ = 100.0f;
+ if (zoom_ > 500.f)
+ zoom_ = 500.0f;
update();
}
@@ -346,7 +346,7 @@ void FPGAViewWidget::paintGL()
matrix.scale(zoom_ * 0.01f, -zoom_ * 0.01f, 0);
// Draw grid.
- auto grid = LineShaderData(0.01f, QColor("#DDD"));
+ auto grid = LineShaderData(0.001f, QColor("#DDD"));
for (float i = -100.0f; i < 100.0f; i += 1.0f) {
PolyLine(-100.0f, i, 100.0f, i).build(grid);
PolyLine(i, -100.0f, i, 100.0f).build(grid);
@@ -354,7 +354,7 @@ void FPGAViewWidget::paintGL()
lineShader_.draw(grid, matrix);
// Draw Bels.
- auto bels = LineShaderData(0.02f, QColor("#b000ba"));
+ auto bels = LineShaderData(0.0005f, QColor("#b000ba"));
if (ctx_) {
for (auto bel : ctx_->getBels()) {
for (auto &el : ctx_->getBelGraphics(bel))
@@ -363,8 +363,28 @@ void FPGAViewWidget::paintGL()
lineShader_.draw(bels, matrix);
}
+ // Draw Wires.
+ auto wires = LineShaderData(0.0005f, QColor("#b000ba"));
+ if (ctx_) {
+ for (auto wire : ctx_->getWires()) {
+ for (auto &el : ctx_->getWireGraphics(wire))
+ drawElement(wires, el);
+ }
+ lineShader_.draw(wires, matrix);
+ }
+
+ // Draw Pips.
+ auto pips = LineShaderData(0.0005f, QColor("#b000ba"));
+ if (ctx_) {
+ for (auto wire : ctx_->getPips()) {
+ for (auto &el : ctx_->getPipGraphics(wire))
+ drawElement(pips, el);
+ }
+ lineShader_.draw(pips, matrix);
+ }
+
// Draw Frame Graphics.
- auto frames = LineShaderData(0.02f, QColor("#0066ba"));
+ auto frames = LineShaderData(0.002f, QColor("#0066ba"));
if (ctx_) {
for (auto &el : ctx_->getFrameGraphics()) {
drawElement(frames, el);
diff --git a/ice40/arch.cc b/ice40/arch.cc
index 72f9c1f3..a25c3d87 100644
--- a/ice40/arch.cc
+++ b/ice40/arch.cc
@@ -22,6 +22,8 @@
#include "log.h"
#include "nextpnr.h"
#include "util.h"
+#include "gfx.h"
+
NEXTPNR_NAMESPACE_BEGIN
// -----------------------------------------------------------------------
@@ -398,100 +400,143 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const
// -----------------------------------------------------------------------
-std::vector<GraphicElement> Arch::getFrameGraphics() const
+DecalXY Arch::getFrameDecal() const
{
- std::vector<GraphicElement> ret;
+ DecalXY decalxy;
+ decalxy.decal.type = 'f';
+ return decalxy;
+}
- for (int x = 0; x <= chip_info->width; x++)
- for (int y = 0; y <= chip_info->height; y++) {
- GraphicElement el;
- el.type = GraphicElement::G_LINE;
- el.x1 = x - 0.05, el.x2 = x + 0.05, el.y1 = y, el.y2 = y, el.z = 0;
- ret.push_back(el);
- el.x1 = x, el.x2 = x, el.y1 = y - 0.05, el.y2 = y + 0.05, el.z = 0;
- ret.push_back(el);
- }
+DecalXY Arch::getBelDecal(BelId bel) const
+{
+ DecalXY decalxy;
+ decalxy.decal.type = 'b';
+ decalxy.decal.z = bel.index;
+ return decalxy;
+}
- return ret;
+DecalXY Arch::getWireDecal(WireId wire) const
+{
+ DecalXY decalxy;
+ return decalxy;
}
-std::vector<GraphicElement> Arch::getBelGraphics(BelId bel) const
+DecalXY Arch::getPipDecal(PipId pip) const
+{
+ DecalXY decalxy;
+ return decalxy;
+};
+
+std::vector<GraphicElement> Arch::getDecalGraphics(DecalId decal) const
{
std::vector<GraphicElement> ret;
- auto bel_type = getBelType(bel);
-
- if (bel_type == TYPE_ICESTORM_LC) {
- GraphicElement el;
- el.type = GraphicElement::G_BOX;
- el.x1 = chip_info->bel_data[bel.index].x + 0.1;
- el.x2 = chip_info->bel_data[bel.index].x + 0.9;
- el.y1 = chip_info->bel_data[bel.index].y + 0.10 + (chip_info->bel_data[bel.index].z) * (0.8 / 8);
- el.y2 = chip_info->bel_data[bel.index].y + 0.18 + (chip_info->bel_data[bel.index].z) * (0.8 / 8);
- el.z = 0;
- ret.push_back(el);
+ if (decal.type == 'f')
+ {
+ for (int x = 0; x <= chip_info->width; x++)
+ for (int y = 0; y <= chip_info->height; y++) {
+ GraphicElement el;
+ el.type = GraphicElement::G_LINE;
+ el.x1 = x - 0.05, el.x2 = x + 0.05, el.y1 = y, el.y2 = y, el.z = 0;
+ ret.push_back(el);
+ el.x1 = x, el.x2 = x, el.y1 = y - 0.05, el.y2 = y + 0.05, el.z = 0;
+ ret.push_back(el);
+ }
}
- if (bel_type == TYPE_SB_IO) {
- if (chip_info->bel_data[bel.index].x == 0 || chip_info->bel_data[bel.index].x == chip_info->width - 1) {
+ if (decal.type == 'b')
+ {
+ BelId bel;
+ bel.index = decal.z;
+
+ auto bel_type = getBelType(bel);
+
+ if (bel_type == TYPE_ICESTORM_LC) {
GraphicElement el;
el.type = GraphicElement::G_BOX;
- el.x1 = chip_info->bel_data[bel.index].x + 0.1;
- el.x2 = chip_info->bel_data[bel.index].x + 0.9;
- if (chip_info->bel_data[bel.index].z == 0) {
- el.y1 = chip_info->bel_data[bel.index].y + 0.10;
- el.y2 = chip_info->bel_data[bel.index].y + 0.45;
- } else {
- el.y1 = chip_info->bel_data[bel.index].y + 0.55;
- el.y2 = chip_info->bel_data[bel.index].y + 0.90;
- }
+ el.x1 = chip_info->bel_data[bel.index].x + logic_cell_x1;
+ el.x2 = chip_info->bel_data[bel.index].x + logic_cell_x2;
+ el.y1 = chip_info->bel_data[bel.index].y + logic_cell_y1 + (chip_info->bel_data[bel.index].z) * logic_cell_pitch;
+ el.y2 = chip_info->bel_data[bel.index].y + logic_cell_y2 + (chip_info->bel_data[bel.index].z) * logic_cell_pitch;
el.z = 0;
ret.push_back(el);
- } else {
- GraphicElement el;
- el.type = GraphicElement::G_BOX;
+
if (chip_info->bel_data[bel.index].z == 0) {
- el.x1 = chip_info->bel_data[bel.index].x + 0.10;
- el.x2 = chip_info->bel_data[bel.index].x + 0.45;
+ int tx = chip_info->bel_data[bel.index].x;
+ int ty = chip_info->bel_data[bel.index].y;
+
+ // Main switchbox
+ GraphicElement main_sw;
+ main_sw.type = GraphicElement::G_BOX;
+ main_sw.x1 = tx + main_swbox_x1;
+ main_sw.x2 = tx + main_swbox_x2;
+ main_sw.y1 = ty + main_swbox_y1;
+ main_sw.y2 = ty + main_swbox_y2;
+ ret.push_back(main_sw);
+
+ // Local tracks to LUT input switchbox
+ GraphicElement local_sw;
+ local_sw.type = GraphicElement::G_BOX;
+ local_sw.x1 = tx + local_swbox_x1;
+ local_sw.x2 = tx + local_swbox_x2;
+ local_sw.y1 = ty + local_swbox_y1;
+ local_sw.y2 = ty + local_swbox_y2;
+ local_sw.z = 0;
+ ret.push_back(local_sw);
+
+ // All the wires
+ for (int i = TILE_WIRE_GLB2LOCAL_0; i <= TILE_WIRE_SP12_H_L_23; i++)
+ gfxTileWire(ret, tx, ty, GfxTileWireId(i));
+ }
+ }
+
+ if (bel_type == TYPE_SB_IO) {
+ if (chip_info->bel_data[bel.index].x == 0 || chip_info->bel_data[bel.index].x == chip_info->width - 1) {
+ GraphicElement el;
+ el.type = GraphicElement::G_BOX;
+ el.x1 = chip_info->bel_data[bel.index].x + 0.1;
+ el.x2 = chip_info->bel_data[bel.index].x + 0.9;
+ if (chip_info->bel_data[bel.index].z == 0) {
+ el.y1 = chip_info->bel_data[bel.index].y + 0.10;
+ el.y2 = chip_info->bel_data[bel.index].y + 0.45;
+ } else {
+ el.y1 = chip_info->bel_data[bel.index].y + 0.55;
+ el.y2 = chip_info->bel_data[bel.index].y + 0.90;
+ }
+ el.z = 0;
+ ret.push_back(el);
} else {
- el.x1 = chip_info->bel_data[bel.index].x + 0.55;
- el.x2 = chip_info->bel_data[bel.index].x + 0.90;
+ GraphicElement el;
+ el.type = GraphicElement::G_BOX;
+ if (chip_info->bel_data[bel.index].z == 0) {
+ el.x1 = chip_info->bel_data[bel.index].x + 0.10;
+ el.x2 = chip_info->bel_data[bel.index].x + 0.45;
+ } else {
+ el.x1 = chip_info->bel_data[bel.index].x + 0.55;
+ el.x2 = chip_info->bel_data[bel.index].x + 0.90;
+ }
+ el.y1 = chip_info->bel_data[bel.index].y + 0.1;
+ el.y2 = chip_info->bel_data[bel.index].y + 0.9;
+ el.z = 0;
+ ret.push_back(el);
}
+ }
+
+ if (bel_type == TYPE_ICESTORM_RAM) {
+ GraphicElement el;
+ el.type = GraphicElement::G_BOX;
+ el.x1 = chip_info->bel_data[bel.index].x + 0.1;
+ el.x2 = chip_info->bel_data[bel.index].x + 0.9;
el.y1 = chip_info->bel_data[bel.index].y + 0.1;
- el.y2 = chip_info->bel_data[bel.index].y + 0.9;
+ el.y2 = chip_info->bel_data[bel.index].y + 1.9;
el.z = 0;
ret.push_back(el);
}
}
- if (bel_type == TYPE_ICESTORM_RAM) {
- GraphicElement el;
- el.type = GraphicElement::G_BOX;
- el.x1 = chip_info->bel_data[bel.index].x + 0.1;
- el.x2 = chip_info->bel_data[bel.index].x + 0.9;
- el.y1 = chip_info->bel_data[bel.index].y + 0.1;
- el.y2 = chip_info->bel_data[bel.index].y + 1.9;
- el.z = 0;
- ret.push_back(el);
- }
-
- return ret;
-}
-
-std::vector<GraphicElement> Arch::getWireGraphics(WireId wire) const
-{
- std::vector<GraphicElement> ret;
- // FIXME
return ret;
}
-std::vector<GraphicElement> Arch::getPipGraphics(PipId pip) const
-{
- std::vector<GraphicElement> ret;
- // FIXME
- return ret;
-};
-
// -----------------------------------------------------------------------
bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, delay_t &delay) const
diff --git a/ice40/arch.h b/ice40/arch.h
index 43aa0829..03685152 100644
--- a/ice40/arch.h
+++ b/ice40/arch.h
@@ -643,10 +643,12 @@ struct Arch : BaseCtx
// -------------------------------------------------
- std::vector<GraphicElement> getFrameGraphics() const;
- std::vector<GraphicElement> getBelGraphics(BelId bel) const;
- std::vector<GraphicElement> getWireGraphics(WireId wire) const;
- std::vector<GraphicElement> getPipGraphics(PipId pip) const;
+ std::vector<GraphicElement> getDecalGraphics(DecalId decal) const;
+
+ DecalXY getFrameDecal() const;
+ DecalXY getBelDecal(BelId bel) const;
+ DecalXY getWireDecal(WireId wire) const;
+ DecalXY getPipDecal(PipId pip) const;
bool allGraphicsReload = false;
bool frameGraphicsReload = false;
diff --git a/ice40/archdefs.h b/ice40/archdefs.h
index be2e406d..061e9b44 100644
--- a/ice40/archdefs.h
+++ b/ice40/archdefs.h
@@ -21,6 +21,8 @@
#error Include "archdefs.h" via "nextpnr.h" only.
#endif
+#include <boost/functional/hash_fwd.hpp>
+
NEXTPNR_NAMESPACE_BEGIN
typedef int delay_t;
@@ -107,6 +109,13 @@ struct PipId
bool operator!=(const PipId &other) const { return index != other.index; }
};
+struct DecalId
+{
+ char type = 0; // Bel/Wire/Pip/Frame (b/w/p/f)
+ uint8_t x = 0, y = 0;
+ uint32_t z = 0;
+};
+
NEXTPNR_NAMESPACE_END
namespace std {
@@ -135,4 +144,17 @@ template <> struct hash<NEXTPNR_NAMESPACE_PREFIX BelType> : hash<int>
template <> struct hash<NEXTPNR_NAMESPACE_PREFIX PortPin> : hash<int>
{
};
+
+template <> struct hash<NEXTPNR_NAMESPACE_PREFIX DecalId>
+{
+ std::size_t operator()(const NEXTPNR_NAMESPACE_PREFIX DecalId &decal) const noexcept {
+ std::size_t seed = 0;
+ boost::hash_combine(seed, hash<int>()(decal.type));
+ boost::hash_combine(seed, hash<int>()(decal.x));
+ boost::hash_combine(seed, hash<int>()(decal.y));
+ boost::hash_combine(seed, hash<int>()(decal.z));
+ return seed;
+ }
+};
+
} // namespace std
diff --git a/ice40/gfx.cc b/ice40/gfx.cc
new file mode 100644
index 00000000..e72b2515
--- /dev/null
+++ b/ice40/gfx.cc
@@ -0,0 +1,420 @@
+/*
+ * nextpnr -- Next Generation Place and Route
+ *
+ * Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+
+#include "gfx.h"
+
+NEXTPNR_NAMESPACE_BEGIN
+
+void gfxTileWire(std::vector<GraphicElement> &g, int x, int y, GfxTileWireId id)
+{
+ // Horizontal Span-4 Wires
+
+ if (id >= TILE_WIRE_SP4_H_L_36 && id <= TILE_WIRE_SP4_H_L_47) {
+ int idx = (id - TILE_WIRE_SP4_H_L_36) + 48;
+ GraphicElement el;
+ el.type = GraphicElement::G_LINE;
+
+ float y1 = y + 0.03 + 0.0025 * (60 - idx);
+
+ el.x1 = x + 0.0;
+ el.x2 = x + 0.9;
+ el.y1 = y1;
+ el.y2 = y1;
+ g.push_back(el);
+
+ el.x1 = x + main_swbox_x1 + 0.0025 * (idx + 35);
+ el.x2 = el.x1;
+ el.y1 = y1;
+ el.y2 = y + main_swbox_y1;
+ g.push_back(el);
+ }
+
+ if (id >= TILE_WIRE_SP4_H_R_0 && id <= TILE_WIRE_SP4_H_R_47) {
+ int idx = id - TILE_WIRE_SP4_H_R_0;
+ GraphicElement el;
+ el.type = GraphicElement::G_LINE;
+
+ float y1 = y + 0.03 + 0.0025 * (60 - idx);
+ float y2 = y + 0.03 + 0.0025 * (60 - (idx ^ 1));
+ float y3 = y + 0.03 + 0.0025 * (60 - (idx ^ 1) - 12);
+
+ if (idx >= 12) {
+ el.x1 = x;
+ el.x2 = x + 0.01;
+ el.y1 = y1;
+ el.y2 = y1;
+ g.push_back(el);
+
+ el.x1 = x + 0.01;
+ el.x2 = x + 0.02;
+ el.y1 = y1;
+ el.y2 = y2;
+ g.push_back(el);
+ }
+
+ el.x1 = x + 0.02;
+ el.x2 = x + 0.9;
+ el.y1 = y2;
+ el.y2 = y2;
+ g.push_back(el);
+
+ el.x1 = x + 0.9;
+ el.x2 = x + 1.0;
+ el.y1 = y2;
+ el.y2 = y3;
+ g.push_back(el);
+
+ el.x1 = x + main_swbox_x1 + 0.0025 * ((idx ^ 1) + 35);
+ el.x2 = el.x1;
+ el.y1 = y2;
+ el.y2 = y + main_swbox_y1;
+ g.push_back(el);
+ }
+
+ // Vertical Span-4 Wires
+
+ if (id >= TILE_WIRE_SP4_V_T_36 && id <= TILE_WIRE_SP4_V_T_47) {
+ int idx = (id - TILE_WIRE_SP4_V_T_36) + 48;
+ GraphicElement el;
+ el.type = GraphicElement::G_LINE;
+
+ float x1 = x + 0.03 + 0.0025 * (60 - idx);
+
+ el.y1 = y + 0.0;
+ el.y2 = y + 0.9;
+ el.x1 = x1;
+ el.x2 = x1;
+ g.push_back(el);
+
+ el.y1 = y + 0.03 + 0.0025 * (270 - idx);
+ el.y2 = el.y1;
+ el.x1 = x1;
+ el.x2 = x + main_swbox_x1;
+ g.push_back(el);
+ }
+
+ if (id >= TILE_WIRE_SP4_V_B_0 && id <= TILE_WIRE_SP4_V_B_47) {
+ int idx = id - TILE_WIRE_SP4_V_B_0;
+ GraphicElement el;
+ el.type = GraphicElement::G_LINE;
+
+ float x1 = x + 0.03 + 0.0025 * (60 - (idx ^ 1));
+ float x2 = x + 0.03 + 0.0025 * (60 - idx);
+ float x3 = x + 0.03 + 0.0025 * (60 - idx - 12);
+
+ if (idx >= 12) {
+ el.y1 = y;
+ el.y2 = y + 0.01;
+ el.x1 = x1;
+ el.x2 = x1;
+ g.push_back(el);
+
+ el.y1 = y + 0.01;
+ el.y2 = y + 0.02;
+ el.x1 = x1;
+ el.x2 = x2;
+ g.push_back(el);
+ }
+
+ el.y1 = y + 0.02;
+ el.y2 = y + 0.9;
+ el.x1 = x2;
+ el.x2 = x2;
+ g.push_back(el);
+
+ el.y1 = y + 0.9;
+ el.y2 = y + 1.0;
+ el.x1 = x2;
+ el.x2 = x3;
+ g.push_back(el);
+
+ el.y1 = y + 0.03 + 0.0025 * (145 - idx);
+ el.y2 = el.y1;
+ el.x1 = x;
+ el.x2 = x2;
+ g.push_back(el);
+
+ el.y1 = y + 0.03 + 0.0025 * (270 - idx);
+ el.y2 = el.y1;
+ el.x1 = x2;
+ el.x2 = x + main_swbox_x1;
+ g.push_back(el);
+ }
+
+ // Horizontal Span-12 Wires
+
+ if (id >= TILE_WIRE_SP12_H_L_22 && id <= TILE_WIRE_SP12_H_L_23) {
+ int idx = (id - TILE_WIRE_SP12_H_L_22) + 24;
+ GraphicElement el;
+ el.type = GraphicElement::G_LINE;
+
+ float y1 = y + 0.03 + 0.0025 * (90 - idx);
+
+ el.x1 = x + 0.0;
+ el.x2 = x + 0.98333;
+ el.y1 = y1;
+ el.y2 = y1;
+ g.push_back(el);
+
+ el.x1 = x + main_swbox_x1 + 0.0025 * (idx + 5);
+ el.x2 = el.x1;
+ el.y1 = y1;
+ el.y2 = y + main_swbox_y1;
+ g.push_back(el);
+ }
+
+ if (id >= TILE_WIRE_SP12_H_R_0 && id <= TILE_WIRE_SP12_H_R_23) {
+ int idx = id - TILE_WIRE_SP12_H_R_0;
+ GraphicElement el;
+ el.type = GraphicElement::G_LINE;
+
+ float y1 = y + 0.03 + 0.0025 * (90 - (idx ^ 1));
+ float y2 = y + 0.03 + 0.0025 * (90 - idx);
+ float y3 = y + 0.03 + 0.0025 * (90 - idx - 2);
+
+ if (idx >= 2) {
+ el.x1 = x;
+ el.x2 = x + 0.01;
+ el.y1 = y1;
+ el.y2 = y1;
+ g.push_back(el);
+
+ el.x1 = x + 0.01;
+ el.x2 = x + 0.02;
+ el.y1 = y1;
+ el.y2 = y2;
+ g.push_back(el);
+ }
+
+ el.x1 = x + 0.02;
+ el.x2 = x + 0.98333;
+ el.y1 = y2;
+ el.y2 = y2;
+ g.push_back(el);
+
+ el.x1 = x + 0.98333;
+ el.x2 = x + 1.0;
+ el.y1 = y2;
+ el.y2 = y3;
+ g.push_back(el);
+
+ el.x1 = x + main_swbox_x1 + 0.0025 * (idx + 5);
+ el.x2 = el.x1;
+ el.y1 = y2;
+ el.y2 = y + main_swbox_y1;
+ g.push_back(el);
+ }
+
+ // Vertical Right Span-4
+
+ if (id >= TILE_WIRE_SP4_R_V_B_0 && id <= TILE_WIRE_SP4_R_V_B_47) {
+ int idx = id - TILE_WIRE_SP4_R_V_B_0;
+ GraphicElement el;
+ el.type = GraphicElement::G_LINE;
+
+ float y1 = y + 0.03 + 0.0025 * (145 - idx);
+
+ el.y1 = y1;
+ el.y2 = y1;
+ el.x1 = x + main_swbox_x2;
+ el.x2 = x + 1.0;
+ g.push_back(el);
+ }
+
+ // Vertical Span-12 Wires
+
+ if (id >= TILE_WIRE_SP12_V_T_22 && id <= TILE_WIRE_SP12_V_T_23) {
+ int idx = (id - TILE_WIRE_SP12_V_T_22) + 24;
+ GraphicElement el;
+ el.type = GraphicElement::G_LINE;
+
+ float x1 = x + 0.03 + 0.0025 * (90 - idx);
+
+ el.y1 = y + 0.0;
+ el.y2 = y + 0.98333;
+ el.x1 = x1;
+ el.x2 = x1;
+ g.push_back(el);
+
+ el.y1 = y + 0.03 + 0.0025 * (300 - idx);
+ el.y2 = el.y1;
+ el.x1 = x1;
+ el.x2 = x + main_swbox_x1;
+ g.push_back(el);
+ }
+
+ if (id >= TILE_WIRE_SP12_V_B_0 && id <= TILE_WIRE_SP12_V_B_23) {
+ int idx = id - TILE_WIRE_SP12_V_B_0;
+ GraphicElement el;
+ el.type = GraphicElement::G_LINE;
+
+ float x1 = x + 0.03 + 0.0025 * (90 - idx);
+ float x2 = x + 0.03 + 0.0025 * (90 - (idx ^ 1));
+ float x3 = x + 0.03 + 0.0025 * (90 - (idx ^ 1) - 2);
+
+ if (idx >= 2) {
+ el.y1 = y;
+ el.y2 = y + 0.01;
+ el.x1 = x1;
+ el.x2 = x1;
+ g.push_back(el);
+
+ el.y1 = y + 0.01;
+ el.y2 = y + 0.02;
+ el.x1 = x1;
+ el.x2 = x2;
+ g.push_back(el);
+ }
+
+ el.y1 = y + 0.02;
+ el.y2 = y + 0.98333;
+ el.x1 = x2;
+ el.x2 = x2;
+ g.push_back(el);
+
+ el.y1 = y + 0.98333;
+ el.y2 = y + 1.0;
+ el.x1 = x2;
+ el.x2 = x3;
+ g.push_back(el);
+
+ el.y1 = y + 0.03 + 0.0025 * (300 - (idx ^ 1));
+ el.y2 = el.y1;
+ el.x1 = x2;
+ el.x2 = x + main_swbox_x1;
+ g.push_back(el);
+ }
+
+ // Global2Local
+
+ if (id >= TILE_WIRE_GLB2LOCAL_0 && id <= TILE_WIRE_GLB2LOCAL_3) {
+ int idx = id - TILE_WIRE_GLB2LOCAL_0;
+ GraphicElement el;
+ el.type = GraphicElement::G_LINE;
+ el.x1 = x + main_swbox_x1 + 0.005 * (idx + 5);
+ el.x2 = el.x1;
+ el.y1 = y + main_swbox_y2;
+ el.y2 = el.y1 + 0.02;
+ g.push_back(el);
+ }
+
+ // GlobalNets
+
+ if (id >= TILE_WIRE_GLB_NETWK_0 && id <= TILE_WIRE_GLB_NETWK_7) {
+ int idx = id - TILE_WIRE_GLB_NETWK_0;
+ GraphicElement el;
+ el.type = GraphicElement::G_LINE;
+ el.x1 = x + main_swbox_x1 - 0.05;
+ el.x2 = x + main_swbox_x1;
+ el.y1 = y + main_swbox_y2 - 0.005 * (13 - idx);
+ el.y2 = el.y1;
+ g.push_back(el);
+ }
+
+ // Neighbours
+
+ if (id >= TILE_WIRE_NEIGH_OP_BNL_0 && id <= TILE_WIRE_NEIGH_OP_TOP_7) {
+ int idx = id - TILE_WIRE_NEIGH_OP_BNL_0;
+ GraphicElement el;
+ el.type = GraphicElement::G_LINE;
+ el.y1 = y + main_swbox_y1 + 0.0025 * (idx + 10) + 0.01 * (idx / 8);
+ el.y2 = el.y1;
+ el.x1 = x + main_swbox_x1 - 0.05;
+ el.x2 = x + main_swbox_x1;
+ g.push_back(el);
+ }
+
+ // Local Tracks
+
+ if (id >= TILE_WIRE_LOCAL_G0_0 && id <= TILE_WIRE_LOCAL_G3_7) {
+ int idx = id - TILE_WIRE_LOCAL_G0_0;
+ GraphicElement el;
+ el.type = GraphicElement::G_LINE;
+ el.x1 = x + main_swbox_x2;
+ el.x2 = x + local_swbox_x1;
+ float yoff = y + (local_swbox_y1 + local_swbox_y2) / 2 - 0.005 * 16 - 0.075;
+ el.y1 = yoff + 0.005 * idx + 0.05 * (idx / 8);
+ el.y2 = el.y1;
+ g.push_back(el);
+ }
+
+ // LC Inputs
+
+ if (id >= TILE_WIRE_LUTFF_0_IN_0 && id <= TILE_WIRE_LUTFF_7_IN_3) {
+ int idx = id - TILE_WIRE_LUTFF_0_IN_0;
+ int z = idx / 4;
+ int input = idx % 4;
+ GraphicElement el;
+ el.type = GraphicElement::G_LINE;
+ el.x1 = x + local_swbox_x2;
+ el.x2 = x + logic_cell_x1;
+ el.y1 = y + 0.4675 + (0.005 * input) + z * logic_cell_pitch;
+ el.y2 = el.y1;
+ g.push_back(el);
+ }
+
+ // LC Outputs
+
+ if (id >= TILE_WIRE_LUTFF_0_OUT && id <= TILE_WIRE_LUTFF_7_OUT) {
+ int idx = id - TILE_WIRE_LUTFF_0_OUT;
+
+ float y1 = y + 0.03 + 0.0025 * (159 - idx);
+
+ GraphicElement el;
+ el.type = GraphicElement::G_LINE;
+ el.y1 = y1;
+ el.y2 = y1;
+ el.x1 = x + main_swbox_x2;
+ el.x2 = x + 0.97 + 0.0025 * idx;
+ g.push_back(el);
+
+ el.y1 = y1;
+ el.y2 = y + (logic_cell_y1 + logic_cell_y2) / 2 + idx * logic_cell_pitch;
+ el.x1 = el.x2;
+ g.push_back(el);
+
+ el.y1 = el.y2;
+ el.x1 = x + logic_cell_x2;
+ g.push_back(el);
+ }
+
+ // LC Control
+
+ if (id >= TILE_WIRE_LUTFF_GLOBAL_CEN && id <= TILE_WIRE_LUTFF_GLOBAL_S_R) {
+ int idx = id - TILE_WIRE_LUTFF_GLOBAL_CEN;
+ GraphicElement el;
+ el.type = GraphicElement::G_LINE;
+
+ el.x1 = x + main_swbox_x2 - 0.005 * (idx + 5);
+ el.x2 = el.x1;
+ el.y1 = y + main_swbox_y2;
+ el.y2 = el.y1 + 0.005 * (idx + 3);
+ g.push_back(el);
+
+ el.y1 = el.y2;
+ el.x2 = x + logic_cell_x2 - 0.005 * (2 - idx + 5);
+ g.push_back(el);
+
+ el.y2 = y + logic_cell_y2 + 7*logic_cell_pitch;
+ el.x1 = el.x2;
+ g.push_back(el);
+ }
+}
+
+NEXTPNR_NAMESPACE_END
diff --git a/ice40/gfx.h b/ice40/gfx.h
new file mode 100644
index 00000000..9fce27e8
--- /dev/null
+++ b/ice40/gfx.h
@@ -0,0 +1,473 @@
+/*
+ * nextpnr -- Next Generation Place and Route
+ *
+ * Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+
+#ifndef GFX_H
+#define GFX_H
+
+#include "nextpnr.h"
+
+NEXTPNR_NAMESPACE_BEGIN
+
+const float main_swbox_x1 = 0.35;
+const float main_swbox_x2 = 0.60;
+const float main_swbox_y1 = 0.27;
+const float main_swbox_y2 = 0.95;
+
+const float local_swbox_x1 = 0.63;
+const float local_swbox_x2 = 0.73;
+const float local_swbox_y1 = 0.45;
+const float local_swbox_y2 = 0.9375;
+
+const float logic_cell_x1 = 0.76;
+const float logic_cell_x2 = 0.95;
+const float logic_cell_y1 = 0.45;
+const float logic_cell_y2 = 0.50;
+const float logic_cell_pitch = 0.0625;
+
+enum GfxTileWireId {
+ TILE_WIRE_GLB2LOCAL_0,
+ TILE_WIRE_GLB2LOCAL_1,
+ TILE_WIRE_GLB2LOCAL_2,
+ TILE_WIRE_GLB2LOCAL_3,
+
+ TILE_WIRE_GLB_NETWK_0,
+ TILE_WIRE_GLB_NETWK_1,
+ TILE_WIRE_GLB_NETWK_2,
+ TILE_WIRE_GLB_NETWK_3,
+ TILE_WIRE_GLB_NETWK_4,
+ TILE_WIRE_GLB_NETWK_5,
+ TILE_WIRE_GLB_NETWK_6,
+ TILE_WIRE_GLB_NETWK_7,
+
+ TILE_WIRE_LOCAL_G0_0,
+ TILE_WIRE_LOCAL_G0_1,
+ TILE_WIRE_LOCAL_G0_2,
+ TILE_WIRE_LOCAL_G0_3,
+ TILE_WIRE_LOCAL_G0_4,
+ TILE_WIRE_LOCAL_G0_5,
+ TILE_WIRE_LOCAL_G0_6,
+ TILE_WIRE_LOCAL_G0_7,
+
+ TILE_WIRE_LOCAL_G1_0,
+ TILE_WIRE_LOCAL_G1_1,
+ TILE_WIRE_LOCAL_G1_2,
+ TILE_WIRE_LOCAL_G1_3,
+ TILE_WIRE_LOCAL_G1_4,
+ TILE_WIRE_LOCAL_G1_5,
+ TILE_WIRE_LOCAL_G1_6,
+ TILE_WIRE_LOCAL_G1_7,
+
+ TILE_WIRE_LOCAL_G2_0,
+ TILE_WIRE_LOCAL_G2_1,
+ TILE_WIRE_LOCAL_G2_2,
+ TILE_WIRE_LOCAL_G2_3,
+ TILE_WIRE_LOCAL_G2_4,
+ TILE_WIRE_LOCAL_G2_5,
+ TILE_WIRE_LOCAL_G2_6,
+ TILE_WIRE_LOCAL_G2_7,
+
+ TILE_WIRE_LOCAL_G3_0,
+ TILE_WIRE_LOCAL_G3_1,
+ TILE_WIRE_LOCAL_G3_2,
+ TILE_WIRE_LOCAL_G3_3,
+ TILE_WIRE_LOCAL_G3_4,
+ TILE_WIRE_LOCAL_G3_5,
+ TILE_WIRE_LOCAL_G3_6,
+ TILE_WIRE_LOCAL_G3_7,
+
+ TILE_WIRE_CARRY_IN,
+ TILE_WIRE_CARRY_IN_MUX,
+
+ TILE_WIRE_LUTFF_0_IN_0,
+ TILE_WIRE_LUTFF_0_IN_1,
+ TILE_WIRE_LUTFF_0_IN_2,
+ TILE_WIRE_LUTFF_0_IN_3,
+
+ TILE_WIRE_LUTFF_1_IN_0,
+ TILE_WIRE_LUTFF_1_IN_1,
+ TILE_WIRE_LUTFF_1_IN_2,
+ TILE_WIRE_LUTFF_1_IN_3,
+
+ TILE_WIRE_LUTFF_2_IN_0,
+ TILE_WIRE_LUTFF_2_IN_1,
+ TILE_WIRE_LUTFF_2_IN_2,
+ TILE_WIRE_LUTFF_2_IN_3,
+
+ TILE_WIRE_LUTFF_3_IN_0,
+ TILE_WIRE_LUTFF_3_IN_1,
+ TILE_WIRE_LUTFF_3_IN_2,
+ TILE_WIRE_LUTFF_3_IN_3,
+
+ TILE_WIRE_LUTFF_4_IN_0,
+ TILE_WIRE_LUTFF_4_IN_1,
+ TILE_WIRE_LUTFF_4_IN_2,
+ TILE_WIRE_LUTFF_4_IN_3,
+
+ TILE_WIRE_LUTFF_5_IN_0,
+ TILE_WIRE_LUTFF_5_IN_1,
+ TILE_WIRE_LUTFF_5_IN_2,
+ TILE_WIRE_LUTFF_5_IN_3,
+
+ TILE_WIRE_LUTFF_6_IN_0,
+ TILE_WIRE_LUTFF_6_IN_1,
+ TILE_WIRE_LUTFF_6_IN_2,
+ TILE_WIRE_LUTFF_6_IN_3,
+
+ TILE_WIRE_LUTFF_7_IN_0,
+ TILE_WIRE_LUTFF_7_IN_1,
+ TILE_WIRE_LUTFF_7_IN_2,
+ TILE_WIRE_LUTFF_7_IN_3,
+
+ TILE_WIRE_LUTFF_0_LOUT,
+ TILE_WIRE_LUTFF_1_LOUT,
+ TILE_WIRE_LUTFF_2_LOUT,
+ TILE_WIRE_LUTFF_3_LOUT,
+ TILE_WIRE_LUTFF_4_LOUT,
+ TILE_WIRE_LUTFF_5_LOUT,
+ TILE_WIRE_LUTFF_6_LOUT,
+
+ TILE_WIRE_LUTFF_0_OUT,
+ TILE_WIRE_LUTFF_1_OUT,
+ TILE_WIRE_LUTFF_2_OUT,
+ TILE_WIRE_LUTFF_3_OUT,
+ TILE_WIRE_LUTFF_4_OUT,
+ TILE_WIRE_LUTFF_5_OUT,
+ TILE_WIRE_LUTFF_6_OUT,
+ TILE_WIRE_LUTFF_7_OUT,
+
+ TILE_WIRE_LUTFF_0_COUT,
+ TILE_WIRE_LUTFF_1_COUT,
+ TILE_WIRE_LUTFF_2_COUT,
+ TILE_WIRE_LUTFF_3_COUT,
+ TILE_WIRE_LUTFF_4_COUT,
+ TILE_WIRE_LUTFF_5_COUT,
+ TILE_WIRE_LUTFF_6_COUT,
+ TILE_WIRE_LUTFF_7_COUT,
+
+ TILE_WIRE_LUTFF_GLOBAL_CEN,
+ TILE_WIRE_LUTFF_GLOBAL_CLK,
+ TILE_WIRE_LUTFF_GLOBAL_S_R,
+
+ TILE_WIRE_NEIGH_OP_BNL_0,
+ TILE_WIRE_NEIGH_OP_BNL_1,
+ TILE_WIRE_NEIGH_OP_BNL_2,
+ TILE_WIRE_NEIGH_OP_BNL_3,
+ TILE_WIRE_NEIGH_OP_BNL_4,
+ TILE_WIRE_NEIGH_OP_BNL_5,
+ TILE_WIRE_NEIGH_OP_BNL_6,
+ TILE_WIRE_NEIGH_OP_BNL_7,
+
+ TILE_WIRE_NEIGH_OP_BNR_0,
+ TILE_WIRE_NEIGH_OP_BNR_1,
+ TILE_WIRE_NEIGH_OP_BNR_2,
+ TILE_WIRE_NEIGH_OP_BNR_3,
+ TILE_WIRE_NEIGH_OP_BNR_4,
+ TILE_WIRE_NEIGH_OP_BNR_5,
+ TILE_WIRE_NEIGH_OP_BNR_6,
+ TILE_WIRE_NEIGH_OP_BNR_7,
+
+ TILE_WIRE_NEIGH_OP_BOT_0,
+ TILE_WIRE_NEIGH_OP_BOT_1,
+ TILE_WIRE_NEIGH_OP_BOT_2,
+ TILE_WIRE_NEIGH_OP_BOT_3,
+ TILE_WIRE_NEIGH_OP_BOT_4,
+ TILE_WIRE_NEIGH_OP_BOT_5,
+ TILE_WIRE_NEIGH_OP_BOT_6,
+ TILE_WIRE_NEIGH_OP_BOT_7,
+
+ TILE_WIRE_NEIGH_OP_LFT_0,
+ TILE_WIRE_NEIGH_OP_LFT_1,
+ TILE_WIRE_NEIGH_OP_LFT_2,
+ TILE_WIRE_NEIGH_OP_LFT_3,
+ TILE_WIRE_NEIGH_OP_LFT_4,
+ TILE_WIRE_NEIGH_OP_LFT_5,
+ TILE_WIRE_NEIGH_OP_LFT_6,
+ TILE_WIRE_NEIGH_OP_LFT_7,
+
+ TILE_WIRE_NEIGH_OP_RGT_0,
+ TILE_WIRE_NEIGH_OP_RGT_1,
+ TILE_WIRE_NEIGH_OP_RGT_2,
+ TILE_WIRE_NEIGH_OP_RGT_3,
+ TILE_WIRE_NEIGH_OP_RGT_4,
+ TILE_WIRE_NEIGH_OP_RGT_5,
+ TILE_WIRE_NEIGH_OP_RGT_6,
+ TILE_WIRE_NEIGH_OP_RGT_7,
+
+ TILE_WIRE_NEIGH_OP_TNL_0,
+ TILE_WIRE_NEIGH_OP_TNL_1,
+ TILE_WIRE_NEIGH_OP_TNL_2,
+ TILE_WIRE_NEIGH_OP_TNL_3,
+ TILE_WIRE_NEIGH_OP_TNL_4,
+ TILE_WIRE_NEIGH_OP_TNL_5,
+ TILE_WIRE_NEIGH_OP_TNL_6,
+ TILE_WIRE_NEIGH_OP_TNL_7,
+
+ TILE_WIRE_NEIGH_OP_TNR_0,
+ TILE_WIRE_NEIGH_OP_TNR_1,
+ TILE_WIRE_NEIGH_OP_TNR_2,
+ TILE_WIRE_NEIGH_OP_TNR_3,
+ TILE_WIRE_NEIGH_OP_TNR_4,
+ TILE_WIRE_NEIGH_OP_TNR_5,
+ TILE_WIRE_NEIGH_OP_TNR_6,
+ TILE_WIRE_NEIGH_OP_TNR_7,
+
+ TILE_WIRE_NEIGH_OP_TOP_0,
+ TILE_WIRE_NEIGH_OP_TOP_1,
+ TILE_WIRE_NEIGH_OP_TOP_2,
+ TILE_WIRE_NEIGH_OP_TOP_3,
+ TILE_WIRE_NEIGH_OP_TOP_4,
+ TILE_WIRE_NEIGH_OP_TOP_5,
+ TILE_WIRE_NEIGH_OP_TOP_6,
+ TILE_WIRE_NEIGH_OP_TOP_7,
+
+ TILE_WIRE_SP4_V_B_0,
+ TILE_WIRE_SP4_V_B_1,
+ TILE_WIRE_SP4_V_B_2,
+ TILE_WIRE_SP4_V_B_3,
+ TILE_WIRE_SP4_V_B_4,
+ TILE_WIRE_SP4_V_B_5,
+ TILE_WIRE_SP4_V_B_6,
+ TILE_WIRE_SP4_V_B_7,
+ TILE_WIRE_SP4_V_B_8,
+ TILE_WIRE_SP4_V_B_9,
+ TILE_WIRE_SP4_V_B_10,
+ TILE_WIRE_SP4_V_B_11,
+ TILE_WIRE_SP4_V_B_12,
+ TILE_WIRE_SP4_V_B_13,
+ TILE_WIRE_SP4_V_B_14,
+ TILE_WIRE_SP4_V_B_15,
+ TILE_WIRE_SP4_V_B_16,
+ TILE_WIRE_SP4_V_B_17,
+ TILE_WIRE_SP4_V_B_18,
+ TILE_WIRE_SP4_V_B_19,
+ TILE_WIRE_SP4_V_B_20,
+ TILE_WIRE_SP4_V_B_21,
+ TILE_WIRE_SP4_V_B_22,
+ TILE_WIRE_SP4_V_B_23,
+ TILE_WIRE_SP4_V_B_24,
+ TILE_WIRE_SP4_V_B_25,
+ TILE_WIRE_SP4_V_B_26,
+ TILE_WIRE_SP4_V_B_27,
+ TILE_WIRE_SP4_V_B_28,
+ TILE_WIRE_SP4_V_B_29,
+ TILE_WIRE_SP4_V_B_30,
+ TILE_WIRE_SP4_V_B_31,
+ TILE_WIRE_SP4_V_B_32,
+ TILE_WIRE_SP4_V_B_33,
+ TILE_WIRE_SP4_V_B_34,
+ TILE_WIRE_SP4_V_B_35,
+ TILE_WIRE_SP4_V_B_36,
+ TILE_WIRE_SP4_V_B_37,
+ TILE_WIRE_SP4_V_B_38,
+ TILE_WIRE_SP4_V_B_39,
+ TILE_WIRE_SP4_V_B_40,
+ TILE_WIRE_SP4_V_B_41,
+ TILE_WIRE_SP4_V_B_42,
+ TILE_WIRE_SP4_V_B_43,
+ TILE_WIRE_SP4_V_B_44,
+ TILE_WIRE_SP4_V_B_45,
+ TILE_WIRE_SP4_V_B_46,
+ TILE_WIRE_SP4_V_B_47,
+
+ TILE_WIRE_SP4_V_T_36,
+ TILE_WIRE_SP4_V_T_37,
+ TILE_WIRE_SP4_V_T_38,
+ TILE_WIRE_SP4_V_T_39,
+ TILE_WIRE_SP4_V_T_40,
+ TILE_WIRE_SP4_V_T_41,
+ TILE_WIRE_SP4_V_T_42,
+ TILE_WIRE_SP4_V_T_43,
+ TILE_WIRE_SP4_V_T_44,
+ TILE_WIRE_SP4_V_T_45,
+ TILE_WIRE_SP4_V_T_46,
+ TILE_WIRE_SP4_V_T_47,
+
+ TILE_WIRE_SP4_R_V_B_0,
+ TILE_WIRE_SP4_R_V_B_1,
+ TILE_WIRE_SP4_R_V_B_2,
+ TILE_WIRE_SP4_R_V_B_3,
+ TILE_WIRE_SP4_R_V_B_4,
+ TILE_WIRE_SP4_R_V_B_5,
+ TILE_WIRE_SP4_R_V_B_6,
+ TILE_WIRE_SP4_R_V_B_7,
+ TILE_WIRE_SP4_R_V_B_8,
+ TILE_WIRE_SP4_R_V_B_9,
+ TILE_WIRE_SP4_R_V_B_10,
+ TILE_WIRE_SP4_R_V_B_11,
+ TILE_WIRE_SP4_R_V_B_12,
+ TILE_WIRE_SP4_R_V_B_13,
+ TILE_WIRE_SP4_R_V_B_14,
+ TILE_WIRE_SP4_R_V_B_15,
+ TILE_WIRE_SP4_R_V_B_16,
+ TILE_WIRE_SP4_R_V_B_17,
+ TILE_WIRE_SP4_R_V_B_18,
+ TILE_WIRE_SP4_R_V_B_19,
+ TILE_WIRE_SP4_R_V_B_20,
+ TILE_WIRE_SP4_R_V_B_21,
+ TILE_WIRE_SP4_R_V_B_22,
+ TILE_WIRE_SP4_R_V_B_23,
+ TILE_WIRE_SP4_R_V_B_24,
+ TILE_WIRE_SP4_R_V_B_25,
+ TILE_WIRE_SP4_R_V_B_26,
+ TILE_WIRE_SP4_R_V_B_27,
+ TILE_WIRE_SP4_R_V_B_28,
+ TILE_WIRE_SP4_R_V_B_29,
+ TILE_WIRE_SP4_R_V_B_30,
+ TILE_WIRE_SP4_R_V_B_31,
+ TILE_WIRE_SP4_R_V_B_32,
+ TILE_WIRE_SP4_R_V_B_33,
+ TILE_WIRE_SP4_R_V_B_34,
+ TILE_WIRE_SP4_R_V_B_35,
+ TILE_WIRE_SP4_R_V_B_36,
+ TILE_WIRE_SP4_R_V_B_37,
+ TILE_WIRE_SP4_R_V_B_38,
+ TILE_WIRE_SP4_R_V_B_39,
+ TILE_WIRE_SP4_R_V_B_40,
+ TILE_WIRE_SP4_R_V_B_41,
+ TILE_WIRE_SP4_R_V_B_42,
+ TILE_WIRE_SP4_R_V_B_43,
+ TILE_WIRE_SP4_R_V_B_44,
+ TILE_WIRE_SP4_R_V_B_45,
+ TILE_WIRE_SP4_R_V_B_46,
+ TILE_WIRE_SP4_R_V_B_47,
+
+ TILE_WIRE_SP4_H_L_36,
+ TILE_WIRE_SP4_H_L_37,
+ TILE_WIRE_SP4_H_L_38,
+ TILE_WIRE_SP4_H_L_39,
+ TILE_WIRE_SP4_H_L_40,
+ TILE_WIRE_SP4_H_L_41,
+ TILE_WIRE_SP4_H_L_42,
+ TILE_WIRE_SP4_H_L_43,
+ TILE_WIRE_SP4_H_L_44,
+ TILE_WIRE_SP4_H_L_45,
+ TILE_WIRE_SP4_H_L_46,
+ TILE_WIRE_SP4_H_L_47,
+
+ TILE_WIRE_SP4_H_R_0,
+ TILE_WIRE_SP4_H_R_1,
+ TILE_WIRE_SP4_H_R_2,
+ TILE_WIRE_SP4_H_R_3,
+ TILE_WIRE_SP4_H_R_4,
+ TILE_WIRE_SP4_H_R_5,
+ TILE_WIRE_SP4_H_R_6,
+ TILE_WIRE_SP4_H_R_7,
+ TILE_WIRE_SP4_H_R_8,
+ TILE_WIRE_SP4_H_R_9,
+ TILE_WIRE_SP4_H_R_10,
+ TILE_WIRE_SP4_H_R_11,
+ TILE_WIRE_SP4_H_R_12,
+ TILE_WIRE_SP4_H_R_13,
+ TILE_WIRE_SP4_H_R_14,
+ TILE_WIRE_SP4_H_R_15,
+ TILE_WIRE_SP4_H_R_16,
+ TILE_WIRE_SP4_H_R_17,
+ TILE_WIRE_SP4_H_R_18,
+ TILE_WIRE_SP4_H_R_19,
+ TILE_WIRE_SP4_H_R_20,
+ TILE_WIRE_SP4_H_R_21,
+ TILE_WIRE_SP4_H_R_22,
+ TILE_WIRE_SP4_H_R_23,
+ TILE_WIRE_SP4_H_R_24,
+ TILE_WIRE_SP4_H_R_25,
+ TILE_WIRE_SP4_H_R_26,
+ TILE_WIRE_SP4_H_R_27,
+ TILE_WIRE_SP4_H_R_28,
+ TILE_WIRE_SP4_H_R_29,
+ TILE_WIRE_SP4_H_R_30,
+ TILE_WIRE_SP4_H_R_31,
+ TILE_WIRE_SP4_H_R_32,
+ TILE_WIRE_SP4_H_R_33,
+ TILE_WIRE_SP4_H_R_34,
+ TILE_WIRE_SP4_H_R_35,
+ TILE_WIRE_SP4_H_R_36,
+ TILE_WIRE_SP4_H_R_37,
+ TILE_WIRE_SP4_H_R_38,
+ TILE_WIRE_SP4_H_R_39,
+ TILE_WIRE_SP4_H_R_40,
+ TILE_WIRE_SP4_H_R_41,
+ TILE_WIRE_SP4_H_R_42,
+ TILE_WIRE_SP4_H_R_43,
+ TILE_WIRE_SP4_H_R_44,
+ TILE_WIRE_SP4_H_R_45,
+ TILE_WIRE_SP4_H_R_46,
+ TILE_WIRE_SP4_H_R_47,
+
+ TILE_WIRE_SP12_V_B_0,
+ TILE_WIRE_SP12_V_B_1,
+ TILE_WIRE_SP12_V_B_2,
+ TILE_WIRE_SP12_V_B_3,
+ TILE_WIRE_SP12_V_B_4,
+ TILE_WIRE_SP12_V_B_5,
+ TILE_WIRE_SP12_V_B_6,
+ TILE_WIRE_SP12_V_B_7,
+ TILE_WIRE_SP12_V_B_8,
+ TILE_WIRE_SP12_V_B_9,
+ TILE_WIRE_SP12_V_B_10,
+ TILE_WIRE_SP12_V_B_11,
+ TILE_WIRE_SP12_V_B_12,
+ TILE_WIRE_SP12_V_B_13,
+ TILE_WIRE_SP12_V_B_14,
+ TILE_WIRE_SP12_V_B_15,
+ TILE_WIRE_SP12_V_B_16,
+ TILE_WIRE_SP12_V_B_17,
+ TILE_WIRE_SP12_V_B_18,
+ TILE_WIRE_SP12_V_B_19,
+ TILE_WIRE_SP12_V_B_20,
+ TILE_WIRE_SP12_V_B_21,
+ TILE_WIRE_SP12_V_B_22,
+ TILE_WIRE_SP12_V_B_23,
+
+ TILE_WIRE_SP12_V_T_22,
+ TILE_WIRE_SP12_V_T_23,
+
+ TILE_WIRE_SP12_H_R_0,
+ TILE_WIRE_SP12_H_R_1,
+ TILE_WIRE_SP12_H_R_2,
+ TILE_WIRE_SP12_H_R_3,
+ TILE_WIRE_SP12_H_R_4,
+ TILE_WIRE_SP12_H_R_5,
+ TILE_WIRE_SP12_H_R_6,
+ TILE_WIRE_SP12_H_R_7,
+ TILE_WIRE_SP12_H_R_8,
+ TILE_WIRE_SP12_H_R_9,
+ TILE_WIRE_SP12_H_R_10,
+ TILE_WIRE_SP12_H_R_11,
+ TILE_WIRE_SP12_H_R_12,
+ TILE_WIRE_SP12_H_R_13,
+ TILE_WIRE_SP12_H_R_14,
+ TILE_WIRE_SP12_H_R_15,
+ TILE_WIRE_SP12_H_R_16,
+ TILE_WIRE_SP12_H_R_17,
+ TILE_WIRE_SP12_H_R_18,
+ TILE_WIRE_SP12_H_R_19,
+ TILE_WIRE_SP12_H_R_20,
+ TILE_WIRE_SP12_H_R_21,
+ TILE_WIRE_SP12_H_R_22,
+ TILE_WIRE_SP12_H_R_23,
+
+ TILE_WIRE_SP12_H_L_22,
+ TILE_WIRE_SP12_H_L_23
+};
+
+void gfxTileWire(std::vector<GraphicElement> &g, int x, int y, GfxTileWireId id);
+
+NEXTPNR_NAMESPACE_END
+
+#endif // GFX_H
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-16 01:20:46 +0000