diff options
| -rw-r--r-- | machxo2/cells.cc | 2 | ||||
| -rw-r--r-- | machxo2/pack.cc | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/machxo2/cells.cc b/machxo2/cells.cc index 7d15b1af..5dea36e2 100644 --- a/machxo2/cells.cc +++ b/machxo2/cells.cc @@ -166,7 +166,7 @@ void dff_to_lc(Context *ctx, CellInfo *dff, CellInfo *lc, bool pass_thru_lut) // If a register's DI port is fed by a constant, options for placing are // limited. Use the LUT to get around this. if(pass_thru_lut) { - lc->params[ctx->id("LUT0_INITVAL")] = 0xAAAA; + lc->params[ctx->id("LUT0_INITVAL")] = Property(0xAAAA, 16);; replace_port(dff, ctx->id("DI"), lc, ctx->id("A0")); connect_ports(ctx, lc, ctx->id("F0"), lc, ctx->id("DI0")); } else { diff --git a/machxo2/pack.cc b/machxo2/pack.cc index 786a84d6..c745a1c0 100644 --- a/machxo2/pack.cc +++ b/machxo2/pack.cc @@ -142,6 +142,8 @@ static void set_net_constant(Context *ctx, NetInfo *orig, NetInfo *constnet, boo log_info("FACADE_FF %s is driven by a constant\n", uc->name.c_str(ctx)); std::unique_ptr<CellInfo> lc = create_machxo2_cell(ctx, id_FACADE_SLICE, uc->name.str(ctx) + "_CONST"); + std::copy(uc->attrs.begin(), uc->attrs.end(), std::inserter(lc->attrs, lc->attrs.begin())); + dff_to_lc(ctx, uc, lc.get(), true); packed_cells.insert(uc->name); |