diff options
| -rw-r--r-- | dummy/arch_place.cc | 4 | ||||
| -rw-r--r-- | dummy/arch_place.h | 4 | ||||
| -rw-r--r-- | ice40/arch_place.cc | 4 | ||||
| -rw-r--r-- | ice40/arch_place.h | 4 | ||||
| -rw-r--r-- | ice40/chip.h | 12 | ||||
| -rw-r--r-- | ice40/pack.cc | 4 | ||||
| -rw-r--r-- | ice40/pack.h | 4 |
7 files changed, 30 insertions, 6 deletions
diff --git a/dummy/arch_place.cc b/dummy/arch_place.cc index e41b8cc3..15f813ae 100644 --- a/dummy/arch_place.cc +++ b/dummy/arch_place.cc @@ -19,7 +19,11 @@ #include "arch_place.h" +NEXTPNR_NAMESPACE_BEGIN + bool isValidBelForCell(Design *design, CellInfo *cell, BelId bel) { return true; } + +NEXTPNR_NAMESPACE_END diff --git a/dummy/arch_place.h b/dummy/arch_place.h index 446396e9..66789b7d 100644 --- a/dummy/arch_place.h +++ b/dummy/arch_place.h @@ -22,6 +22,8 @@ #include "nextpnr.h" +NEXTPNR_NAMESPACE_BEGIN + // Architecure-specific placement functions // Whether or not a given cell can be placed at a given Bel @@ -29,4 +31,6 @@ // such as conflicting set/reset signals, etc bool isValidBelForCell(Design *design, CellInfo *cell, BelId bel); +NEXTPNR_NAMESPACE_END + #endif diff --git a/ice40/arch_place.cc b/ice40/arch_place.cc index 2367d981..dbc8036c 100644 --- a/ice40/arch_place.cc +++ b/ice40/arch_place.cc @@ -19,6 +19,8 @@ #include "arch_place.h" +NEXTPNR_NAMESPACE_BEGIN + static bool logicCellsCompatible(const std::vector<const CellInfo *> &cells) { bool dffs_exist = false, dffs_neg = false; @@ -87,3 +89,5 @@ bool isValidBelForCell(Design *design, CellInfo *cell, BelId bel) return true; } } + +NEXTPNR_NAMESPACE_END diff --git a/ice40/arch_place.h b/ice40/arch_place.h index 8f8ce806..a505f4db 100644 --- a/ice40/arch_place.h +++ b/ice40/arch_place.h @@ -23,9 +23,13 @@ #include "nextpnr.h" // Architecure-specific placement functions +NEXTPNR_NAMESPACE_BEGIN + // Whether or not a given cell can be placed at a given Bel // This is not intended for Bel type checks, but finer-grained constraints // such as conflicting set/reset signals, etc bool isValidBelForCell(Design *design, CellInfo *cell, BelId bel); +NEXTPNR_NAMESPACE_END + #endif diff --git a/ice40/chip.h b/ice40/chip.h index e48a4973..96416c04 100644 --- a/ice40/chip.h +++ b/ice40/chip.h @@ -215,25 +215,25 @@ struct BelPin NEXTPNR_NAMESPACE_END namespace std { -template <> struct hash<NEXTPNR_NAMESPACE::BelId> +template <> struct hash<NEXTPNR_NAMESPACE_PREFIX BelId> { - std::size_t operator()(const NEXTPNR_NAMESPACE::BelId &bel) const noexcept + std::size_t operator()(const NEXTPNR_NAMESPACE_PREFIX BelId &bel) const noexcept { return bel.index; } }; -template <> struct hash<NEXTPNR_NAMESPACE::WireId> +template <> struct hash<NEXTPNR_NAMESPACE_PREFIX WireId> { - std::size_t operator()(const NEXTPNR_NAMESPACE::WireId &wire) const noexcept + std::size_t operator()(const NEXTPNR_NAMESPACE_PREFIX WireId &wire) const noexcept { return wire.index; } }; -template <> struct hash<NEXTPNR_NAMESPACE::PipId> +template <> struct hash<NEXTPNR_NAMESPACE_PREFIX PipId> { - std::size_t operator()(const NEXTPNR_NAMESPACE::PipId &wire) const noexcept + std::size_t operator()(const NEXTPNR_NAMESPACE_PREFIX PipId &wire) const noexcept { return wire.index; } diff --git a/ice40/pack.cc b/ice40/pack.cc index ff421c17..a6e17378 100644 --- a/ice40/pack.cc +++ b/ice40/pack.cc @@ -25,6 +25,8 @@ #include <unordered_set> +NEXTPNR_NAMESPACE_BEGIN + // Pack LUTs and LUT-FF pairs static void pack_lut_lutffs(Design *design) { @@ -120,3 +122,5 @@ void pack_design(Design *design) pack_lut_lutffs(design); pack_nonlut_ffs(design); } + +NEXTPNR_NAMESPACE_END diff --git a/ice40/pack.h b/ice40/pack.h index 87a390ff..4a92a7ab 100644 --- a/ice40/pack.h +++ b/ice40/pack.h @@ -22,6 +22,10 @@ #include "nextpnr.h" +NEXTPNR_NAMESPACE_BEGIN + void pack_design(Design *design); +NEXTPNR_NAMESPACE_END + #endif // ROUTE_H |