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author | gatecat <gatecat@ds0.me> | 2021-12-19 16:41:34 +0000 |
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committer | gatecat <gatecat@ds0.me> | 2021-12-19 17:15:15 +0000 |
commit | ddb084e9a8a0cba10536951236cde824526e8071 (patch) | |
tree | d03ba5688367cb476a06b19d04ca78d0352afce3 /nexus | |
parent | 56d550733346000584b9490fac0953fe07124035 (diff) | |
download | nextpnr-ddb084e9a8a0cba10536951236cde824526e8071.tar.gz nextpnr-ddb084e9a8a0cba10536951236cde824526e8071.tar.bz2 nextpnr-ddb084e9a8a0cba10536951236cde824526e8071.zip |
archapi: Use arbitrary rather than actual placement in predictDelay
This makes predictDelay be based on an arbitrary belpin pair rather
than a arc of a net based on cell placement. This way 'what-if'
decisions can be evaluated without actually changing placement;
potentially useful for parallel placement.
A new helper predictArcDelay behaves like the old predictDelay to
minimise the impact on existing passes; only arches need be updated.
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'nexus')
-rw-r--r-- | nexus/arch.cc | 12 | ||||
-rw-r--r-- | nexus/arch.h | 2 |
2 files changed, 6 insertions, 8 deletions
diff --git a/nexus/arch.cc b/nexus/arch.cc index 74a06478..a7751425 100644 --- a/nexus/arch.cc +++ b/nexus/arch.cc @@ -603,16 +603,14 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const int dist_y = std::abs(src_y - dst_y); return 75 * dist_x + 75 * dist_y + 250; } -delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const +delay_t Arch::predictDelay(BelId src_bel, IdString src_pin, BelId dst_bel, IdString dst_pin) const { - if (net_info->driver.cell == nullptr || net_info->driver.cell->bel == BelId() || sink.cell->bel == BelId()) + NPNR_UNUSED(src_pin); + if (dst_pin == id_FCI) return 0; - if (sink.port == id_FCI) - return 0; - int src_x = net_info->driver.cell->bel.tile % chip_info->width, - src_y = net_info->driver.cell->bel.tile / chip_info->width; + int src_x = src_bel.tile % chip_info->width, src_y = src_bel.tile / chip_info->width; - int dst_x = sink.cell->bel.tile % chip_info->width, dst_y = sink.cell->bel.tile / chip_info->width; + int dst_x = dst_bel.tile % chip_info->width, dst_y = dst_bel.tile / chip_info->width; int dist_x = std::abs(src_x - dst_x); int dist_y = std::abs(src_y - dst_y); return 100 * dist_x + 100 * dist_y + 250; diff --git a/nexus/arch.h b/nexus/arch.h index edebec1b..0bd1b62c 100644 --- a/nexus/arch.h +++ b/nexus/arch.h @@ -1291,7 +1291,7 @@ struct Arch : BaseArch<ArchRanges> // ------------------------------------------------- delay_t estimateDelay(WireId src, WireId dst) const override; - delay_t predictDelay(const NetInfo *net_info, const PortRef &sink) const override; + delay_t predictDelay(BelId src_bel, IdString src_pin, BelId dst_bel, IdString dst_pin) const override; delay_t getDelayEpsilon() const override { return 20; } delay_t getRipupDelayPenalty() const override; delay_t getWireRipupDelayPenalty(WireId wire) const; |