clangformat.

2 files changed, 12 insertions, 9 deletions

diff --git a/machxo2/bitstream.cc b/machxo2/bitstream.cc
index 913d7b58..f624d91b 100644
--- a/machxo2/bitstream.cc
+++ b/machxo2/bitstream.cc
@@ -62,6 +62,7 @@ static std::string get_trellis_wirename(Context *ctx, Location loc, WireId wire)
     // relative coords push them outside the bounds of the chip.
     // Indents are based on wires proximity/purpose.
     auto is_pio_wire = [](std::string name) {
+        // clang-format off
         return (name.find("DI") != std::string::npos || name.find("JDI") != std::string::npos ||
                     name.find("PADD") != std::string::npos || name.find("INDD") != std::string::npos ||
                     name.find("IOLDO") != std::string::npos || name.find("IOLTO") != std::string::npos ||
@@ -77,6 +78,7 @@ static std::string get_trellis_wirename(Context *ctx, Location loc, WireId wire)
                 name.find("JIN") != std::string::npos || name.find("JIP") != std::string::npos ||
                 // Connections to global mux
                 name.find("JINCK") != std::string::npos);
+        // clang-format on
     };
 
     if (prefix2 == "G_" || prefix2 == "L_" || prefix2 == "R_" || prefix7 == "BRANCH_")
@@ -103,14 +105,14 @@ static std::string get_trellis_wirename(Context *ctx, Location loc, WireId wire)
             if (wire.location.x == 0) {
                 std::string pio_name = "W1_" + basename;
                 if (ctx->verbose)
-                    log_info("PIO wire %s was adjusted by W1 to form Trellis name %s.\n", \
-                        ctx->nameOfWire(wire), pio_name.c_str());
+                    log_info("PIO wire %s was adjusted by W1 to form Trellis name %s.\n", ctx->nameOfWire(wire),
+                             pio_name.c_str());
                 return pio_name;
             } else if (wire.location.x == max_col) {
                 std::string pio_name = "E1_" + basename;
                 if (ctx->verbose)
-                    log_info("PIO wire %s was adjusted by E1 to form Trellis name %s.\n", \
-                        ctx->nameOfWire(wire), pio_name.c_str());
+                    log_info("PIO wire %s was adjusted by E1 to form Trellis name %s.\n", ctx->nameOfWire(wire),
+                             pio_name.c_str());
                 return pio_name;
             }
         }
diff --git a/machxo2/pack.cc b/machxo2/pack.cc
index 231cc99d..c53229ba 100644
--- a/machxo2/pack.cc
+++ b/machxo2/pack.cc
@@ -229,16 +229,17 @@ static bool is_nextpnr_iob(Context *ctx, CellInfo *cell)
 
 static bool is_facade_iob(const Context *ctx, const CellInfo *cell) { return cell->type == id_FACADE_IO; }
 
-static bool nextpnr_iob_connects_only_facade_iob(Context *ctx, CellInfo *iob, NetInfo *&top) {
+static bool nextpnr_iob_connects_only_facade_iob(Context *ctx, CellInfo *iob, NetInfo *&top)
+{
     NPNR_ASSERT(is_nextpnr_iob(ctx, iob));
 
-    if(iob->type == ctx->id("$nextpnr_ibuf")) {
+    if (iob->type == ctx->id("$nextpnr_ibuf")) {
         NetInfo *o = iob->ports.at(id_O).net;
         top = o;
 
         CellInfo *fio = net_only_drives(ctx, o, is_facade_iob, id_PAD, true);
         return fio != nullptr;
-    } else if(iob->type == ctx->id("$nextpnr_obuf")) {
+    } else if (iob->type == ctx->id("$nextpnr_obuf")) {
         NetInfo *i = iob->ports.at(id_I).net;
         top = i;
 
@@ -249,7 +250,7 @@ static bool nextpnr_iob_connects_only_facade_iob(Context *ctx, CellInfo *iob, Ne
         // we already know that the net drives the $nextpnr_obuf.
         CellInfo *fio = net_only_drives(ctx, i, is_facade_iob, id_PAD, true, iob);
         return fio != nullptr;
-    } else if(iob->type == ctx->id("$nextpnr_iobuf")) {
+    } else if (iob->type == ctx->id("$nextpnr_iobuf")) {
         NetInfo *o = iob->ports.at(id_O).net;
         top = o;
 
@@ -281,7 +282,7 @@ static void pack_io(Context *ctx)
         if (is_nextpnr_iob(ctx, ci)) {
             NetInfo *top;
 
-            if(!nextpnr_iob_connects_only_facade_iob(ctx, ci, top))
+            if (!nextpnr_iob_connects_only_facade_iob(ctx, ci, top))
                 log_error("Top level net '%s' is not connected to a FACADE_IO PAD port.\n", top->name.c_str(ctx));
 
             if (ctx->verbose)